TLE8209-2 Datasheet, PDF (32/41 Pages) Infineon Technologies AG – SPI Programmable H-Bridge

9.2.5 Configuration Register
CONFIG_REG
Configuration Register
7
6
Reset Value: 1111 1010_B
5
4
3
2
MODE
MUX
SIN1
SIN2
CL1
CL2
TLE8209-2
SPI Interface
1
0
RESET
SL
Field
Bits
MODE
7
MUX
6
SIN1
5
SIN2
4
CL1
3
CL2
2
RESET
1
SL
0
Type
wr
wr
wr
wr
wr
wr
wr
wr
Description
’1’: H-bridge mode
’0’: single output stages (for current levels 1 to 3 only)
’1’: control by parallel inputs IN1 and IN2
’0’: control by SPI bits SIN1 and SIN2
control of OUT1 if MUX=’0’
control of OUT2 if MUX=’0’
current limitation level (see table below)
current limitation level (see table below)
’0’: reset of digital logic
slew rate setting
’1’: slow
’0’: fast
Table 9 Current Limitation Levels
CL1
CL2
Current Limitation Level Typical Current Limitation Threshold
0
0
1
1.5A
0
1
2
4.0A
1
0
1
1
3 (default)
4 ¹⁾
6.6A
8.6A
1) The current limitation level 4 is applicable in the 430 mil power package only (TLE8209-2SA in PG-DSO-20-65).
Level 4 must not be used in the 300 mil exposed pad package (TLE8209-2E in PG-DSO-20-71).
Data Sheet
32
Rev. 1.4, 2014-10-28