TLE8209-2 Datasheet, PDF (28/41 Pages) Infineon Technologies AG – SPI Programmable H-Bridge

TLE8209-2
SPI Interface
Table 5
7
SPI Instruction Format
6
5
CPAD1
CPAD0
INSTR5
4
INSTR4
3
INSTR3
2
INSTR2
1
INSTR1
0
INSTR0
Field
Bits
CPAD1:0 7:6
INSTR5:0 5:0
Type
w
w
Description
Chip Address (00_B)
SPI Instruction (encoding)
SO remains tristated
after SS active
Address sent by
master is "00_B"
Correct addres is recognized,
data transmitted to SO
SS
SCK
SI
SO
7 65 4 32 1 07 ^{6 5 43 2 10}
76 5 43 2 10 7 6 54 3 21 0
Z
5 43 2 10 7 6 54 3 21 0
SO remains tristated
after SS active
Address sent by master
is different from "00 "
B
Correct addres is not recognized, SO
remains tristated and SI data are ignored
SS
SCK
SI
SO
7 65 4 32 1 07 6 5 43 2 10
76 5 43 ₂ 10 ₇ 6 54 3 21 0
Z
Figure 17 Bus Arbitration by Chip Address
Data Sheet
28
Rev. 1.4, 2014-10-28