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TLE8209-2 Datasheet, PDF (14/41 Pages) Infineon Technologies AG – SPI Programmable H-Bridge
TLE8209-2
Logic Inputs and Outputs
Electrical Characteristics: Control Inputs (cont’d)
VS = 5 V to 28 V; VDD = 5.0 V; Tj = -40 ⋅C to 150 ⋅C, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
Pos. Parameter
Symbol
Limit Values
Unit Test Conditions
Min.
Typ. Max.
SCK
6.0.27
6.0.28
6.0.29
6.0.30
6.0.31
SS/SF
Low level
VSCK_L
-0.3
High level
VSCK_H
2.0
Hysteresis
VSCK_HYS 0.2
Input Current (Pull Up) ISCK
-30
Input Capacity1)
CSCK
–
–
1.0
V–
–
VDD+0.3 V
–
–
1.0
V–
-20 -10
–
14
µA 0 V < VSCK < 2.1 V
pF 2)
6.0.32
6.0.33
6.0.34
6.0.35
6.0.36
6.0.37
6.0.38
6.0.39
6.0.40
SO
Low level
High level
Hysteresis
Input Current in SPI
mode (Pull Up)
Input Current in SF
mode (Open Drain)
Input Capacity1)
VSS_L
VSS_H
VSS_HYS
ISS
-0.3
2.0
0.2
-30
-30
0
ISF
0
300
CSS
–
–
1.0
V–
–
VDD+0.3 V
–
–
1.0
V–
-20 -10
–
5
2
5
2
5
–
–
–
15
µA 0 V < VSS < 2.1 V
µA 2.1 V < VSS < 3.0 V
µA VSS > 3.0 V
µA VSF = 5.0 V, SF inactive
µA VSF = 1.0 V, SF active
pF 2)
6.0.41 Low level
6.0.42 High level
VSO_L
VSO_H
0.0
–
VDDIO-0.75 –
6.0.43 Output capacitance1) CSO
–
–
6.0.44 Leakage current
ISO
-2
–
1) Not subject to production test; specified by design
2) Vbias = 2 V; Vtest = 20 mVpp; f = 1 MHz
0.4
VDDIO
19
2
V
ISO = 2 mA
V
ISO = -2 mA
2.9 V < VDDIO < 5.5 V
pF In tristate2)
μA In tristate
0 < VSO < VDDIO
Data Sheet
14
Rev. 1.4, 2014-10-28