C167CS Datasheet, PDF (240/517 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller

C167CS
Derivatives
The General Purpose Timer Units
10.1.2 GPT1 Auxiliary Timers T2 and T4
Both auxiliary timers T2 and T4 have exactly the same functionality. They can be
configured for timer, gated timer, counter, or incremental interface mode with the same
options for the timer frequencies and the count signal as the core timer T3. In addition to
these 4 counting modes, the auxiliary timers can be concatenated with the core timer, or
they may be used as reload or capture registers in conjunction with the core timer.
The individual configuration for timers T2 and T4 is determined by their bitaddressable
control registers T2CON and T4CON, which are both organized identically. Note that
functions which are present in all 3 timers of block GPT1 are controlled in the same bit
positions and in the same manner in each of the specific control registers.
Note: The auxiliary timers have no output toggle latch and no alternate output function.
T2CON
Timer 2 Control Register
15 14 13 12 11 10
------
------
SFR (FF40_H/A0_H)
Reset Value: 0000_H
9876543210
-
T2
UDE
T2
UD
T2R
T2M
T2I
- rw rw rw
rw
rw
T4CON
Timer 4 Control Register
15 14 13 12 11 10
------
------
SFR (FF44_H/A2_H)
Reset Value: 0000_H
9876543210
-
T4
UDE
T4
UD
T4R
T4M
T4I
- rw rw rw
rw
rw
User’s Manual
10-12
V2.0, 2000-07