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HYB25D256800BT Datasheet, PDF (22/29 Pages) Infineon Technologies AG – 256MBit Double Data Rata SDRAM
HYB25D256[800/160]BT(L)-[5/5A]
256MBit Double Data Rata SDRAM
Preliminary DDR400 Data Sheet Addendum
Operating Conditions
Absolute Maximum Ratings
Symbol
Parameter
VIN, VOUT Voltage on I/O pins relative to VSS
VIN
Voltage on Inputs relative to VSS
VDD
Voltage on VDD supply relative to VSS
Rating
-0.5 to VDDQ+ 0.5
-0.5 to +3.6
-0.5 to +3.6
Units
V
V
V
VDDQ
TA
TSTG
PD
IOUT
Voltage on VDDQ supply relative to VSS
Operating Temperature (Ambient)
Storage Temperature (Plastic)
Power Dissipation
Short Circuit Output Current
-0.5 to +3.6
V
0 to +70
°C
-55 to +150
°C
1.0
W
50
mA
Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sec-
tions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Input and Output Capacitances
Parameter
Package Symbol
Min.
Max.
Units
Notes
Input Capacitance: CK, CK
Delta Input Capacitance CK, CK
Input Capacitance: All other input-only pins
Delta Input Capacitance: All other input-only pins
Input/Output Capacitance: DQ, DQS, DM
Delta Input/Output Capacitance : DQ, DQS, DM
TSOP
CI1
2.0
3.0
pF
1
TSOP
CdI1
-
0.25
pF
1
TSOP
CI2
2.0
3.0
pF
1
TSOP
CdI2
-
0.5
pF
1
TSOP
CIO
4.0
5.0
pF
1, 2
TSOP
CdIO
-
0.5
pF
1
1. These values are guaranteed by design and are tested on a sample base only. VDDQ = VDD = 2.6V ± 0.1V, f = 100MHz, TA = 25°C,
VOUT (DC) = VDDQ/2, VOUT (Peak to Peak) 0.2V. Unused pins are tied to ground .
2. DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching
at the board level
Page 22 of 29
2003-01-10, V0.9