HYS72D32300GBR Datasheet, PDF (21/38 Pages) Infineon Technologies AG – 184-Pin Registered Double Data Rate SDRAM Module

Table 11 I_DD Specification for PC2700
HYS72D[128/64/32][300/320]GBR–[5/6]–C
Registered Double Data Rate SDRAM
Current Specification and Conditions
Unit Note/ Test Conditions^{1) 2)}
256 MB
512 MB
512 MB
1 GB
×72
×72
×72
×72
1 Rank
1 Rank
2 Ranks
2 Ranks
–6
–6
–6
–6
Symbol Typ. Max. Typ. Max. Typ. Max. Typ. Max.
I_DD0
I_DD1
I_DD2P
I_DD2F
I_DD2Q
I_DD3P
I_DD3N
I_DD4R
I_DD4W
I_DD5
I_DD6
I_DD7
1270 1405 1810 2080 1558 1747 2386 2764 mA ³⁾
1360 1495 1990 2260 1648 1837 2566 2944 mA ³⁾⁴⁾
466 475 502 520 574 610 718 790 mA ⁵⁾
655 700 880 970 880 970 1330 1510 mA ⁵⁾
583 646 736 862 736 862 1042 1294 mA ⁵⁾
529 565 628 700 628 700 826 970 mA ⁵⁾
718 772 1006 1114 1006 1114 1582 1798 mA ⁵⁾
1360 1495 1990 2260 1648 1837 2566 2944 mA ³⁾⁴⁾
1405 1540 2080 2350 1693 1882 2656 3034 mA ³⁾
1810 2170 2890 3610 2098 2512 3466 4294 mA ³⁾
443 455 455 480 455 480 480 531 mA ⁵⁾
2350 2665 3970 4600 2638 3007 4546 5284 mA ³⁾⁴⁾
1) Test condition for maximum values: V_DD = 2.7 V, T_A = 10 °C
2) Module I_DD is calculated on the basis of component IDD and includes Register an PLL
3) The module I_DD values are calculated from the component I_DD datasheet values are:
n * I_DD×[component] for single bank modules (n: number of components per module bank)
n * I_DD×[component] + n * I_DD3N[component] for two bank modules (n: number of components per module bank)
4) DQ I/O (I_DDQ) currents are not included into calculations: module I_DD values will be measured differently depending on load
conditions
5) The module I_DD values are calculated from the component I_DD datasheet values are:
n * I_DD×[component] for single bank modules (n: number of components per module bank)
2 * n * I_DD×[component] for single two bank modules (n: number of components per module bank)
Data Sheet
21
Rev. 1.0, 2004-03
07302003-2MI6-FOP1