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HYE25L256160AC Datasheet, PDF (21/55 Pages) Infineon Technologies AG – 256-Mbit Mobile-RAM
HYE25L256160AC
256-Mbit Mobile-RAM
Electrical Characteristics
Table 9 Input and Output Capacitances
Parameter
Input Capacitance: CLK
Input Capacitance: All other input-only pins
Input/Output Capacitance: DQ
Symbol
CI1
CI2
CIO
Values
min. typ. max.
–
– 3.5
–
– 3.8
4.0 – 5.0
Unit
pF
pF
pF
Note/
Test Condition
1)
1)
1)
1) These values are guaranteed by design and are tested on a sample base only. VDDQ = VDD = 2.5 V ± 0.2 V, f = 1 MHz,
TCASE = 25 ° C, VOUT(DC) = VDDQ/2, VOUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.
4.2
Timing Characteristics
Table 10 AC Timing Characteristics1)2)
Parameter
Symbol
–8
–7.5
Unit Note/ Test Condition
min. max. min. max.
Clock
DQ output access time from CLK
tAC3
tAC2
CK high-level width
tCH
CK low-level width
tCL
Clock cycle time
tCK3
tCK2
Clock frequency
fCK3
fCK2
Transition time
tT
Setup and Hold Times
Input setup time
tIS
Input hold time
tIH
CKE setup time
tCKS
CKE hold time
tCKH
Mode register setup time
tRSC
Power down moder entry time
tSB
Common Parameters
Active to Read or Write delay
tRCD
Precharge command period
tRP
Active to Precharge command
tRAS
Active bank A to Active bank A period tRC
Active bank A to Active bank B delay tRRD
– 7.5
–6
–6
– 7.5
–6
3–
3–
8–
8–
9.5 –
– 125
– 125
– 105
0.5 1.5
– 7.5
–6
– 5.4
– 7.5
–6
2.5 –
2.5 –
7.5 –
8–
9.5 –
– 133
– 125
– 105
0.3 1.2
ns VDDQ < 2.3 V 3)4)5)8)
ns VDDQ ≥ 2.3 V 3)4)5)8)
ns VDDQ ≥ 3.0 V 3)4)5)8)
ns VDDQ < 2.3 V 3)4)5)8)
ns VDDQ ≥ 2.3 V 3)4)5)8)
ns –
ns –
ns VDDQ ≥ 2.3 V 3)
ns VDDQ < 2.3 V 3)
ns 3)
MHz VDDQ ≥ 2.3 V 3)
MHz VDDQ < 2.3 V 3)
MHz 3)
ns –
2–
1–
2–
1–
2–
08
1.5 –
0.8 –
1.5 –
0.8 –
2–
0 7.5
ns 6)
ns 6)
ns 6)
ns 6)
tCK –
ns –
19 –
19 –
ns 7)
19 –
19 –
ns 7)
48 100000 45 100000 ns 7)
70 –
67 –
ns 7)
16 –
15 –
ns 7)
Data Sheet
21
V1.1, 2003-04-16