TLE6270R Datasheet, PDF (17/35 Pages) Infineon Technologies AG – Quad Low Side Injector Driver

TLE6270R
Quad Low Side Injector Driver
Functional Description
SCn/OLn Definition Circuit Table:
Table 2 SC/OL Definition Circuit
valid for n=1 or n=4
Memories
Xn
Yn
Zn
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
SCn
0
0
1
0
1
1
1
1
Failures
OLn
0
0
0
1
0
0
0
0
5.4.2 Failures Information (via SPI)
The failures detected are communicated to the microcontroller via a Serial/Peripheral Interface (SPI) in order to
minimize the pin number.
The SPI contains a failure register, a coder, a shift register, and a SDO driver:
CLK
SDI
SDO
NCS
D7
D6
D5
SHIFT
D4
REGISTER
D3
SDO
DRIVER
D2
D1
D0
FSL
CODER
INJ1A_SC_stored
INJ1A_OL_stored
INJ4A_SC_stored
INJ4A_OL_stored
INJ1B_SC_stored
INJ1B_OL_stored
INJ4B_SC_stored
INJ4B_OL_stored
FAILURE
REGISTER
INJ1A_SC
INJ1A_OL
INJ4A_SC
INJ4A_OL
INJ1B_SC
INJ1B_OL
INJ4B_SC
INJ4B_OL
DIAGNOSTIC_CONTROL
Figure 13 Failures Information
Failure Register
Each failure is stored in an individual register (this cannot be done directly in the shift register because a failure
can occur while the shift register is being read).
If the failure occurs, it remains until the SPI is read.
The failure register is cleared when the SPI is read (FR_CLEAR signal).
Output Coder
The SC and OL failures of the 4 outputs are coded on an 8 bit word described hereafter:
Data Sheet
17
V1.3, 2008-12-23