ICS843N3960I Datasheet, PDF (8/20 Pages) Integrated Device Technology – Fourth Generation FemtoClock

ICS843N3960I Data Sheet
Parameter Measurement Information
2V
2V
V_CC
V_CCA
SCOPE
Qx
nQx
V_EE
-
-1.3V ± 0.165V
3.3V LVPECL Output Load AC Test Circuit
FEMTOCLOCK® NG CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
V_CC
nCLK
V
PP
CLK
V_EE
Cross Points
V
CMR
Differential Input Levels
Phase Noise Plot
RMS Phase Jitter =
f₁ ^{Offset Frequency} f₂
1
2*
*
*ƒ
Area Under Curve Defined by the Offset Frequency Markers
RMS Phase Jitter
nQx
Qx
nQy
Qy
t sk(o)
Output Skew
nQ[0:1]
Q[[0:1]
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Output Duty Cycle/Pulse Width/Period
nQ[0:1]
20%
Q[0:1]
80%
t_R
Output Rise/Fall Time
80%
t_F
V_{SW I N G}
20%
ICS843N3960DGI REVISION B SEPTEMBER 24, 2012
8
©2012 Integrated Device Technology, Inc.