|
ICS843N3960I Datasheet, PDF (15/20 Pages) Integrated Device Technology – Fourth Generation FemtoClock | |||
|
◁ |
ICS843N3960I Data Sheet
FEMTOCLOCK® NG CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pair.
LVPECL output driver circuit and termination are shown in Figure 6.
VCC
Q1
VOUT
RL
50â¦
VCC - 2V
Figure 6. LVPECL Driver Circuit and Termination
To calculate power dissipation into the load, use the following equations which assume a 50⦠load, and a termination voltage of VCC â 2V.
These are typical calculations. (NOTE: Below are Final release estimation values.)
⢠For logic high, VOUT = VOH_MAX = VCC_MAX â0.9V
(VCC_MAX â VOH_MAX) = 0.9V
⢠For logic low, VOUT = VOL_MAX = VCC_MAX â 1.7V
(VCC_MAX â VOL_MAX) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(VOH_MAX â (VCC_MAX â 2V))/RL] * (VCC_MAX â VOH_MAX) = [(2V â (VCC_MAX â VOH_MAX))/RL] * (VCC_MAX â VOH_MAX) =
[(2V â 0.9V)/50â¦] *0.9V = 19.8mW
Pd_L = [(VOL_MAX â (VCC_MAX â 2V))/RL] * (VCC_MAX â VOL_MAX) = [(2V â (VCC_MAX â VOL_MAX))/RL] * (VCC_MAX â VOL_MAX) =
[(2V â 1.7V)/50â¦] * 0.9V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
ICS843N3960DGI REVISION B SEPTEMBER 24, 2012
15
©2012 Integrated Device Technology, Inc.
|
▷ |