ICS843N3960I Datasheet, PDF (3/20 Pages) Integrated Device Technology – Fourth Generation FemtoClock

ICS843N3960I Data Sheet
FEMTOCLOCK® NG CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Function Tables
Table 3A. Output Frequency Table
FSEL_1
FSEL_0
M Divider
0 (default)
0 (default)
80
0
1
100
1
0
80
1
1
85
N Divider
20
16
16
10
Output Frequencies (MHz)
100
156.25
125
212.5
Table 3B. Output Enable & Clock Enable Function Table
Control Input
Output
OE
Q0, nQ0
Q1, nQ1
0
High-Impedance
High-Impedance
1 (default)
Enabled
Enabled
Table 3C. CLK_SEL Function Table
Control Input
CLK_SEL
Input Select
0 (default)
Crystal Interface
1
CLK, nCLK selected
LOR Functionality
The ICS843N3960I has a Loss of Reference (LOR) output that is
used to indicate when the input reference has been lost, resulting in
a logic high value on the LOR output. The LOR output is set high
when the input clock experiences a single missed clock edge, or is
completely lost. Once the input clock is recovered, the LOR output is
set back to its low state.
The LOR output pin is deemed in be in a valid state 100ms after the
device has been powered up and the FemtoClock ® NG VCO is
phase locked.
NOTE: The LOR output pin will not accurately reflect the state of the
input if the device is powered up without an input clock present or
properly selected through the input mux interface (CLK_SEL). If this
condition occurs, the device must be power cycled to reset the LOR
circuitry.
Holdover Behavior
The ICS843N3960 has a holdover function. Holdover is
accomplished by putting the charge pump in a high impedance state
after the LOR output has been asserted high. This mode provides a
stable output frequency even when the primary reference has been
lost.
During holdover mode, the charge pump is placed in a high
impedance state and the external charge pump capacitor, CP, is used
to keep the internal VCO tuning voltage steady. Due to leakage
current on this capacitor, the VCO accuracy, in terms of PPM, will
vary over time. By using a 100uF capacitor on CP, the ICS843N3960I
can achieve holdover accuracy of 275ppm over a ten second period.
Note that holdover accuracy can only be achieved when the input
reference clock has been stable for longer than 1ms.
ICS843N3960DGI REVISION B SEPTEMBER 24, 2012
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©2012 Integrated Device Technology, Inc.