ICS8430002 Datasheet, PDF (7/27 Pages) Integrated Device Technology – High-Performance Fractional-N Frequency Synthesizer

ICS8430002 Data Sheet
HIGH-PERFORMANCE FRACTIONAL-N FREQUENCY SYNTHESIZER
Function Tables
Table 3A. Parallel and Serial Mode Function Table
Inputs
MR nP_LOAD M
N S_LOAD S_CLOCK
H
X
X
X
X
X
L
L
Data Data
X
X
L
↑
Data Data
L
X
L
H
X
X
L
↑
L
H
X
X
↑
L
L
H
X
X
↓
L
L
H
X
X
L
X
L
H
X
X
H
↑
NOTE:
L = LOW
H = HIGH
X = Don’t care
↑ = Rising edge transition
↓ = Falling edge transition
S_DATA
X
X
X
Data
Data
Data
X
Data
Conditions
Reset. Forces outputs LOW.
Data on M and N inputs passed directly to the M divider
and N output divider. TEST output forced LOW.
Data is latched into input registers and remains loaded
until next LOW transition or until a serial event occurs.
Serial input mode. Shift register is loaded with data on
S_DATA on each rising edge of S_CLOCK.
Contents of the shift register are passed to the
M divider and N output divider.
M divider and N output divider values are latched.
Parallel or serial input does not affect shift registers.
S_DATA passed directly to M divider as it is clocked.
Table 3B. Programmable VCO Frequency Function Table, P = ÷1
VCO Frequency
32
16
8
4
2
1
(MHz)
M Divide
M5
M4
M3
M2
M1
M0
500
20
0
1
0
1
0
0
•
•
•
•
•
•
•
•
550
22
0
1
0
1
1
0
•
•
•
•
•
•
•
•
625
25
0
1
1
0
0
1
NOTE 1: These M divide values and the resulting frequencies correspond to a crystal frequency of 25MHz.
ICS8430002AY REVISION C NOVEMBER 12, 2009
7
©2009 Integrated Device Technology, Inc.