ICS8430002 Datasheet, PDF (21/27 Pages) Integrated Device Technology – High-Performance Fractional-N Frequency Synthesizer

ICS8430002 Data Sheet
HIGH-PERFORMANCE FRACTIONAL-N FREQUENCY SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8430002.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8430002 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V_CC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)_MAX = V_{CC_MAX} * I_{EE_MAX} = 3.465V * 182mA = 630.63mW
• Power (LVPECL outputs)_MAX = 30mW/Loaded Output pair
• Power (LVPECL output) = 2 * 30mW = 60mW
LVCMOS Output Power Dissipation
• Output Impedance R_OUT Power Dissipation due to Loading 50Ω to V_DDO/2
Output Current I_OUT = V_{DDO_MAX} / [2 * (50Ω + R_OUT)] = 3.465V / [2 * (50Ω + 7Ω)] = 30.4mA
• Power Dissipation on the R_OUT per LVCMOS output
Power (R_OUT) = R_OUT * (I_OUT)² = 7Ω * (30.4mA)² = 6.47mW per output
Total Power Dissipation
• Total Power
= Power (core) + Power (LVPECL output) + Power (R_OUT)
= 630.63mW + 60mW + 6.47mW = 697.1mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C. Limiting the internal transistor junction temperature, Tj, to
125°C ensures that the bond wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = θ_JA * Pd_total + T_A
Tj = Junction Temperature
θ_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ_JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 65.7°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.697W * 65.7°C/W = 115.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board.
Table 8. Thermal Resistance θ_JA for 48 Lead TQFP, Forced Convection
θ_JA by Velocity
Meters per Second
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
65.7°C/W
55.9°C/W
52.4°C/W
ICS8430002AY REVISION C NOVEMBER 12, 2009
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©2009 Integrated Device Technology, Inc.