ICS844N255I Datasheet, PDF (5/21 Pages) Integrated Device Technology – Six differential LVDS clock outputs

ICS844N255I Data Sheet
FEMTOCLOCK^® NG CRYSTAL-TO-LVDS CLOCK SYNTHESIZER
Table 3F. Output QE Frequency Select Function Table
Input
QE, nQE Frequency (MHz)
FSELE
0
50
1 (default)
25
NOTE 1: FSELE is an asynchronous control.
Table 3G. nOEA Output Enable Function Table
Input
QA, nQA Frequency (MHz)
nOEA
0 (default)
Output enabled
1
Output disabled in high-impedance state
NOTE: nOEA is an asynchronous control.
Table 3H. nOEB Output Enable Function Table
Input
Operation
nOEB
0 (default)
QB0, nQB0 - QB1, nQB1 outputs are enabled
1
QB0, nQB0 - QB1, nQB1 Outputs are disabled (high-impedance)
NOTE: nOEB is an asynchronous control.
Table 3I. nOEC Output Enable Function Table
Input
Operation
nOEC
0 (default)
QC, nQC output is enabled
1
QC, nQC output is disabled (high-impedance)
NOTE: nOEC is an asynchronous control.
Table 3J. nOED Output Enable Function Table
Input
Operation
nOED
0 (default)
QD, nQD output is enabled
1
QD, nQD output is disabled (high-impedance)
NOTE: nOED is an asynchronous control.
Table 3K. nOEE Output Enable Function Table
Input
Operation
nOEE
0 (default)
QE, nQE output is enabled
1
QE, nQE is disabled (high-impedance)
NOTE 1: nOEE is an asynchronous control.
ICS844N255AKILF REVISION A NOVEMBER 23, 2011
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