ICS844N255I Datasheet, PDF (3/21 Pages) Integrated Device Technology – Six differential LVDS clock outputs

ICS844N255I Data Sheet
FEMTOCLOCK^® NG CRYSTAL-TO-LVDS CLOCK SYNTHESIZER
Table 1. Pin Descriptions
Number
1, 36, 37, 38, 39, 48
2
3, 4
5
6
7
8
9, 10,
11, 12
13
Name
GND
V_DDOA
QA, nQA
GNDA
nOEA
nOEB
V_DDOB
QB0, nQB0,
QB1, nQB1
GNDB
Type
Power
Power
Output
Power
Input
Pulldown
Input
Pulldown
Power
Description
Power supply ground.
Output supply pin for the output QA.
Differential clock output A. LVDS interface levels.
Power supply ground for the output QA.
Output enable input. See Table 3G. LVCMOS/LVTTL interface levels.
Output enable input. See Table 3H. LVCMOS/LVTTL interface levels.
Output supply pin for the Bank QB outputs.
Output
Differential clock outputs (Bank B). LVDS interface levels.
Power
Power supply ground for the outputs QB0 and QB1.
14
15
16, 17
18
19
FSELB
GNDC
QC, nQC
V_DDOC
nOEC
Input
Power
Output
Power
Input
Pulldown
Pulldown
Frequency select input for Bank B outputs. See Table 3C.
LVCMOS/LVTTL interface levels.
Power supply ground for the output QC.
Differential clock output C. LVDS interface levels.
Output supply pin for the output QC.
Output enable input. See Table 3I. LVCMOS/LVTTL interface levels.
20
21, 34, 40, 41, 43
22
23
24
25, 26
27
28
29
30, 31
32
33
35
42
44,
45
FSELC
V_DD
FSELD
nOED
GNDD
nQD, QD
V_DDOD
FSELE
GNDE
nQE, QE
V_DDOE
nOEE
V_DDA
MSEL
XTAL_IN,
XTAL_OUT
Input
Power
Input
Input
Power
Output
Power
Input
Power
Output
Power
Input
Power
Input
Input
Pullup
Pulldown
Pulldown
Pullup
Pulldown
Pulldown
Frequency select input for output QC. See Table 3D.
LVCMOS/LVTTL interface levels.
Core supply pin.
Frequency select input for output QD. See Table 3E.
LVCMOS/LVTTL interface levels.
Output enable input. See Table 3J. LVCMOS/LVTTL interface levels.
Power supply ground for the output QD.
Differential clock output D. LVDS interface levels.
Output supply pin for the output QD.
Frequency select input for output QE. See Table 3F.
LVCMOS/LVTTL interface levels.
Power supply ground for the output QE.
Differential clock output E. LVDS interface levels.
Output supply pin for the output QE.
Output enable input. See Table 3K. LVCMOS/LVTTL interface levels.
Analog power supply.
Unused control input. Connect to logic LOW level. See Table 3A.
LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the
output.
46
REF_SEL
Input
Pulldown ^{Reference select input. See Table 3B for function.}
LVCMOS/LVTTL interface levels.
47
REF_CLK
Input
Pulldown ^{Alternative reference clock input. See Table 3B.}
LVCMOS/LVTTL interface levels.
NOTE: Pulldown and Pullup refer to an internal input resistors. See Table 2, Pin Characteristics, for typical values.
ICS844N255AKILF REVISION A NOVEMBER 23, 2011
3
©2011 Integrated Device Technology, Inc.