ICS844N255I Datasheet, PDF (1/21 Pages) Integrated Device Technology – Six differential LVDS clock outputs

FemtoClock® NG Crystal-to-LVDS
Clock Synthesizer
ICS844N255I
DATA SHEET
General Description
The ICS844N255I is a 6-output clock synthesizer designed for
wireless infrastructure clock applications. The device uses IDT’s
fourth generation FemtoClock® NG technology for an optimum of
high clock frequency and low phase noise performance, combined
with a low power consumption and high power supply noise
rejection. The reference frequency is selectable and the following
frequency is supported: 25MHz. The synthesizer generates
selectable 156.25MHz, 125MHz, 100MHz, 50MHz and 25MHz clock
signals. The device is optimized for very low phase noise and cycle
to cycle jitter. The synthesized clock frequency and the phase-noise
performance are optimized for driving SRIO 1.3 and 2.0 SerDes
reference, DSP and host-processor clocks. The device supports a
2.5V voltage supply and is packaged in a small, lead-free (RoHS 6)
48-lead VFQFN package. The extended temperature range supports
wireless infrastructure, telecommunication and networking end
equipment requirements.
Features
• 4^TH generation FemtoClock® NG technology
• Selectable 156.25MHz, 125MHz, 100MHz, 50MHz and 25MHz
output clock signals synthesized from a 25MHz reference
frequency
• Six differential LVDS clock outputs
• Crystal interface designed for a 25MHz crystal
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal
(1MHz - 20MHz): 0.27ps (typical)
• Internal regulator for optimum noise rejection
• LVCMOS interface levels for the frequency select and output
enable inputs
• Full 2.5V supply voltage
• Lead-free (RoHS 6) 48-lead VFQFN package
• -40°C to 85°C ambient operating temperature
Block Diagram
XTAL_IN
25MHz
XTAL_OUT
OSC ⁰
25MHz
Pulldown
1
REF_CLK
REF_SEL
MSEL
Pulldown
Pulldown
PFD
FemtoClock® NG
&
VCO
LPF
2500MHz
÷M
FSELB
FSELC
FSELD
FSELE
nOEA
nOEB
nOEC
nOED
nOEE
Pulldown
Pullup
Pulldown
Pullup
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
5
÷16
÷20,
÷25
÷20,
÷25
÷50,
÷100
÷50
÷100
QA
nQA
QB0
nQB0
QB1
nQB1
QC
nQC
QD
nQD
QE
nQE
ICS844N255AKILF REVISION A NOVEMBER 23, 2011
1
©2011 Integrated Device Technology, Inc.