ICS844N255I Datasheet, PDF (4/21 Pages) Integrated Device Technology – Six differential LVDS clock outputs

ICS844N255I Data Sheet
FEMTOCLOCK^® NG CRYSTAL-TO-LVDS CLOCK SYNTHESIZER
Table 2. Pin Characteristics
Symbol
Parameter
C_IN
R_PULLDOWN
R_PULLUP
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
3.5
51
51
Maximum
Units
pF
kΩ
kΩ
Function Tables
Table 3A. Input Reference Frequency and PLL Feedback Multiplier
Reference Frequency Select
Reference Frequency
MSEL
0 (default)
f_ref
25MHz
PLL Feedback Multiplier M
100
Table 3B. PLL Reference Clock Select Function Table
Input
REF_SEL Operation
0 (default) The crystal interface is selected as reference clock. Crystal frequency is 25MHz.
1
The external reference input REF_CLK is selected.
NOTE: REF_SEL is an asynchronous control.
Table 3C. Output QB[1:0] Frequency Select Function Table
Input
FSELB
QB[1:0], nQB[1:0] Frequency (MHz)
0 (default)
125
1
100
NOTE: FSELB is an asynchronous control.
Table 3D. Output QC Frequency Select Function Table
Input
QC, nQC Frequency (MHz)
FSELC
0
125
1 (default)
100
NOTE: FSELC is an asynchronous control.
Table 3E. Output QD Frequency Select Function Table
Input
QD, nQD Frequency (MHz)
FSELD
0 (default)
50
1
25
NOTE: FSELD is an asynchronous control.
ICS844N255AKILF REVISION A NOVEMBER 23, 2011
4
©2011 Integrated Device Technology, Inc.