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| 82V3012 Datasheet, PDF (30/32 Pages) Integrated Device Technology – T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS | |||
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IDT82V3012
F8o
F0o
F16o
F32o
C32o
C16o
C8o
C4o
C2o
(see Note 1)
C6o
C3o
C1.5o
(see Note 1)
F19o
C19o
C19POS
C19NEG
Timing Characteristics
T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS
tF8WH
VT
tF0WL
tF0D
VT
tF16WL
tF16D
tF16S
tF16H
VT
tF32WL
tF32D
tF32S
tF32H
VT
tC32WH
tC32D
VT
tC16W
tC16D
VT
tC8W
tC8W
tC8D
VT
tC4W
tC4W
tC4D
VT
tC2W
tC2D
VT
tC6W
tC6W
tC6D
VT
tC3W
tC3D
VT
tC15W
tC15D
VT
tF19WH
tF19D
VT
tF19S
tF19H
tC19W
tC19D
VT
tC19W
tC19D
VT
tC19W
tC19D
VT
Figure - 13 Output Timing 1
30
February 6, 2009
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