ICS8745BI Datasheet, PDF (3/20 Pages) Integrated Device Technology – 1:5 Differential-to-LVDS Zero Delay Clock Generator

ICS8745BI Data Sheet
1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
Function Tables
Table 3A. Control Input Function Table
Inputs
SEL3
0z
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SEL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Reference Frequency Range (MHz)*
250 - 700
125 - 350
62.5 - 175
31.25 - 87.5
250 - 700
125 - 350
62.5 - 175
250 - 700
125 - 350
250 - 700
125 - 350
62.5 - 175
31.25 - 87.5
62.5 - 175
31.25 - 87.5
31.25 - 87.5
*NOTE: VCO frequency range for all configurations above is 250MHz to 700MHz.
Outputs
PLL_SEL = 1
PLL Enable Mode
Q[0:4], nQ[0:4]
÷1
÷1
÷1
÷1
÷2
÷2
÷2
÷4
÷4
÷8
x2
x2
x2
x4
x4
x8
ICS8745BYI REVISION D JUNE 11, 2009
3
©2009 Integrated Device Technology, Inc.