ICS9ERS3125 Datasheet, PDF (20/22 Pages) Integrated Device Technology – Embedded 56-pin Industrial Temperature Range CK505 Compatible Clock

ICS9ERS3125
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock
Datasheet
Test Clarification Table
Comments
CK_PWRG=1 w/ TEST_SEL = 1 to enter test mode
Cycle power to disable test mode
FSLC./TEST_SEL -->3-level latched input
If CK_PWRG=1 w/ V>2.0V then use TEST_SEL
If CK_PWRG=1 w/ V<2.0V then use FSLC
FSLB/TEST_MODE -->low Vth input
TEST_MODE is a real time input
If TEST_SEL HW pin is 0 after CK_PWRG=1,
test mode can be invoked through B9b3.
If test mode is invoked by B9b3, only B9b4
is used to select HI-Z or REF/N
FSLB/TEST_Mode pin is not used.
Cycle power to disable test mode, one shot control
HW
FSLC/
FSLB/
TEST_SEL TEST_MODE
HW PIN
HW PIN
<2.0V
X
>2.0V
0
>2.0V
0
>2.0V
1
SW
TEST ENTRY REF/N or
BIT
HI-Z
B9b3
B9b4
0
0
X
0
X
1
X
0
>2.0V
1
X
1
<2.0V
X
1
0
<2.0V
X
1
1
OUTPUT
NORMAL
HI-Z
REF/N
REF/N
REF/N
HI-Z
REF/N
B9b3: 1= ENTER TEST MODE, Default = 0 (NORMAL OPERATION)
B9b4: 1= REF/N, Default = 0 (HI-Z)
IDT^TM/ICS^TM Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock
20
1612—08/19/09