ICS9FG108 Datasheet, PDF (18/19 Pages) Integrated Circuit Systems – Programmable FTG for Differential P4 CPU, PCI-Express & SATA Clocks

ICS9FG108
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
N
INDEX
AREA
12
D
c
L
E1 E
a
A2
A
A1
-C-
e
b
SEATING
PLANE
aaa C
48-Lead, 6.10 mm. Body, 0.50 mm. Pitch TSSOP
(240 mil)
(20 mil)
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
N
α
aaa
In Millimeters
COMMON DIMENSIONS
MIN
MAX
--
1.20
0.05
0.15
0.80
1.05
0.17
0.27
0.09
0.20
SEE VARIATIONS
8.10 BASIC
6.00
6.20
0.50 BASIC
0.45
0.75
SEE VARIATIONS
0°
8°
--
0.10
In Inches
COMMON DIMENSIONS
MIN
MAX
--
.047
.002
.006
.032
.041
.007
.011
.0035
.008
SEE VARIATIONS
0.319 BASIC
.236
.244
0.020 BASIC
.018
.030
SEE VARIATIONS
0°
8°
--
.004
VARIATIONS
N
48
D mm.
MIN
MAX
12.40
12.60
D (inch)
MIN
MAX
.488
.496
Reference Doc.: JEDEC Publication 95, MO-153
10-0039
Ordering Information
ICS9FG108yGLF-T
Example:
ICS XXXX y G - LF T
Designation for tape and reel packaging
RoHS Compliant (Optional)
Package Type
G = TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 to 7 digit numbers)
Prefix
ICS
IDT^TM/ICS^TM Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
18
ICS9FG108 REV G 04/06/07