ICS9FG108 Datasheet, PDF (14/19 Pages) Integrated Circuit Systems – Programmable FTG for Differential P4 CPU, PCI-Express & SATA Clocks

ICS9FG108
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
Electrical Characteristics - REF-14.318/25 MHz
T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L = 30 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS Notes
Long Accuracy
ppm
see Tperiod min-max values -300
0
300 ppm 1
Clock period
T_period
14.318MHz output nominal 69.8270 69.8413 69.8550 ns 1,2
Clock period
T_period
25.000MHz output nominal 39.9880 40.0000 40.0120 ns 1,2
Output High Voltage
V_OH
I_OH = -1 mA
2.4
V
1
Output Low Voltage
V_OL
I_OL = 1 mA
0.4
V
1
Output High Current
I_OH
V_OH @MIN = 1.0 V,
-29
V_OH@MAX = 3.135 V
-23 mA
1
Output Low Current
I_OL
V_OL @MIN = 1.95 V,
29
V_OL @MAX = 0.4 V
27
mA
1
Rise Time
t_r1
V_OL = 0.4 V, V_OH = 2.4 V
1
1.6
2
ns
1
Fall Time
t_f1
V_OH = 2.4 V, V_OL = 0.4 V
1
1.6
2
ns
1
Duty Cycle
d_t1
V_T = 1.5 V
45
55
%
1
Jitter
t_jcyc-cyc
V_T = 1.5 V
1_{Guaranteed by design and characterization, not 100% tested in production.}
350
500
ps
1
2 _{All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818 or}
25.00 MHz
Electrical Characteristics - Phase Jitter (Applies to: Revision D Devices, Revision ID = 3)
PARAMETER
Jitter, Phase
SYMBOL
t_{j phas eP LL}
CONDITIONS
PCIe Gen 1 specs
(1.5 - 22 MHz)
FBD specs
(11-33 MHz)
PCIe Gen 2 specs
(5-16 MHz, 8-16 MHz)
MIN
TYP
40
2.23
MAX UNITS Notes
108
ps
1
3 ps rms 1
3.1 ps rms 1, 2
Notes on Phase Jitter:
1 _{Applicable to all DIF outputs. See http://www.pcisig.com for complete specs. Guaranteed by design and characterization, not tested}
in production.
2 _{Specification applies to revision D and later devices.}
IDT^TM/ICS^TM Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
14
ICS9FG108 REV G 04/06/07