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841S104EGILF Datasheet, PDF (18/22 Pages) Integrated Device Technology – Crystal-to-HCSL 100MHz PCI ExpressTM Clock Synthesizer
ICS841S104I Data Sheet
CRYSTAL-TO-HCSL 100MHZ PCI EXPRESSTM CLOCK SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS841S104I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS841S104I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
The maximum current at 85°C is as follows:
IDD_MAX = 77mA
IDDA_MAX = 20mA
• Power (core)MAX = VDD_MAX * (IDD_MAX + IDDA_MAX) = 3.465V *(77mA + 20mA) = 336.105mW
• Power (outputs)MAX = 44.5mW/Loaded Output pair
If all outputs are loaded, the total power is 4 * 44.5mW = 178mW
Total Power_MAX = 336.105mW + 178mW = 514.105mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 77.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.514W * 77.5°C/W = 124.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance θJA for 24 Lead TSSOP, Forced Convection
θJA vs. Air Flow
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
77.5°C/W
1
73.2°C/W
2.5
71.0°C/W
ICS841S104EGI REVISION A JUNE 18, 2010
18
©2010 Integrated Device Technology, Inc.