9DBV0841 Datasheet, PDF (15/16 Pages) Integrated Circuit Systems – HCSL compatible differential input

9DBV0841
8-OUTPUT VERY LOW POWER PCIE GEN1-2-3 BUFFER
Revision History
Rev. Initiator Issue Date Description
Page #
1. Removed "Differential" from DS title and Recommended Application,
corrected typo's in Description. Updated block diagram to show
integrated terminations.
2. Removed references to 60KOhm pulldown under pinout.
3. Updated "Phase Jitter Parameters" table by adding "Industry Limit"
A
column and updated all Electrical Tables with characterization data.
RDW 8/13/2012 _{4. Updated Byte3[0] to be consistent with Byte 2. Updated Byte6[7:6]}
1,2,6-
9,11,13,14
definition.
5. Updated Mark spec with correct part revision (A) and added thermal
data to page 13.
6. Added NDG48 to "Package Outline and Package Dimensions" on page
14 and updated Ordering information to correct part revision (A rev).
7. Move to final
1. Changed VIH min. from 0.65*VDD to 0.75*VDD
B
RDW 2/18/2013 ^{2. Changed VIL max. from 0.35*VDD to 0.25*VDD}
7
3. Added missing mid-level input voltage spec (VIM) of 0.4*VDD to
0.6*VDD.
C RDW 8/12/2014 Changed package designator from "MLF" to "VFQFPN"
Various
IDT® 8-OUTPUT VERY LOW POWER PCIE GEN1-2-3 BUFFER
15
9DBV0841
REV C 081214