ICS8745B Datasheet, PDF (5/15 Pages) Integrated Circuit Systems – 1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS8745B
1:5 DIFFERENTIAL-TO-LVDS
ZERO DELAY CLOCK GENERATOR
TABLE 4D. LVDS DC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
V_OD
Δ V_OD
V
OS
Δ V_OS
Differential Output Voltage
V_OD Magnitude Change
Offset Voltage
V_OS Magnitude Change
320
1.05
Typical
440
0
1.2
Maximum
550
50
1.35
25
Units
mV
mV
V
mV
TABLE 5. INPUT FREQUENCY CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol
f_IN
Parameter
Input Frequency
CLK0, nCLK0,
CLK1, nCLK1
Test Conditions
PLL_SEL = 1
PLL_SEL = 0
Minimum
31.25
Typical
Maximum
700
700
Units
MHz
MHz
TABLE 6. AC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
f_MAX
Output Frequency
700
t_PD
Propagation Delay; NOTE 1
PLL_SEL = 0V, f ≤ 700MHz
3.1
3.4
3.7
tsk(Ø) Static Phase Offset; NOTE 2, 5
PLL_SEL = 3.3V
-100
25
150
tsk(o) Output Skew; NOTE 3, 5
35
tjit(cc) Cycle-to-Cycle Jitter; NOTE 5, 6
30
tjit(θ) Phase Jitter; NOTE 4, 5, 6
±52
odc
Output Duty Cycle
46
50
54
t_L
PLL Lock Time
1
t_R / t_F
Output Rise/Fall Time; NOTE 7
200
700
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as the time difference between the input reference clock and the averaged feedback
input signal across all conditions, when the PLL is locked and the input reference frequency is stable.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 4: Phase jitter is dependent on the input source used.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 6: Characterized at VCO frequency of 622MHz.
NOTE 7: Measured from the 20% to 80% points. Guaranteed by characterization. Not production tested.
Units
MHz
ns
ps
ps
ps
ps
%
ms
ps
8745BY
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5
REV. B DECEMBER 2, 2004