ICS932S422C Datasheet, PDF (2/21 Pages) Integrated Circuit Systems – PCIe Gen 2 main Clock for Intel-based Servers

Integrated
Circuit
Systems, Inc.
Pin Description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN NAME
VDDPCI
GNDPCI
PCICLK0
PCICLK1
PCICLK2
PCICLK3
GNDPCI
VDDPCI
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDD48
48MHz
GND48
VDDSRC
NC
17 Vtt_PwrGd#/PD
18 SRCCLKC1
19 SRCCLKT1
20 GNDSRC
21 SRCCLKT2
22 SRCCLKC2
23 SRCCLKC3
24 SRCCLKT3
25 VDDSRC
26 SRCCLKT4
27 SRCCLKC4
28 VDDSRC
ICS932S422C
PIN TYPE
DESCRIPTION
PWR Power supply for PCI clocks, nominal 3.3V
PWR Ground pin for the PCI outputs
OUT PCI clock output.
OUT PCI clock output.
OUT PCI clock output.
OUT PCI clock output.
PWR Ground pin for the PCI outputs
PWR Power supply for PCI clocks, nominal 3.3V
OUT Free running PCI clock not affected by PCI_STOP# .
OUT Free running PCI clock not affected by PCI_STOP# .
OUT Free running PCI clock not affected by PCI_STOP# .
PWR Power pin for the 48MHz output.3.3V
OUT 48MHz clock output.
PWR Ground pin for the 48MHz outputs
PWR Supply for SRC clocks, 3.3V nominal
N/A No Connection.
Vtt_PwrGd# is an active low input used to determine when latched inputs
are ready to be sampled. PD is an asynchronous active high input pin
IN
used to put the device into a low power state. The internal clocks, PLLs
and the crystal oscillator are stopped.
OUT Complement clock of differential push-pull SRC clock pair.
OUT True clock of differential SRC clock pair.
PWR Ground pin for the SRC outputs
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
OUT True clock of differential SRC clock pair.
PWR Supply for SRC clocks, 3.3V nominal
OUT True clock of differential SRC clock pair.
OUT Complement clock of differential SRC clock pair.
PWR Supply for SRC clocks, 3.3V nominal
1412A—12/10/07
2