ICS9FG1904B-1 Datasheet, PDF (16/22 Pages) Integrated Circuit Systems – Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD

Integrated
Circuit
Systems, Inc.
ICS9FG1904B-1
SMBusTable: Output Enable Readback Register
Byte 4 Pin #
Name
Control Function
Bit 7
69
Readback - OE17_18# Input
Bit 6
60
Readback - OE15_16# Input
Bit 5
Reserved
Bit 4
54
Readback - OE14# Input
Bit 3
51
Readback - OE13# Input
Bit 2
48
Readback - OE12# Input
Bit 1
43
Readback - OE11# Input
Bit 0
40
Readback - OE10# Input
Type
R
R
R
R
R
R
R
SMBusTable: Vendor & Revision ID Register
Byte 5 Pin #
Name
Control Function
Bit 7
-
RID3
Bit 6
-
Bit 5
-
RID2
RID1
REVISION ID
Bit 4
-
RID0
Bit 3
-
VID3
Bit 2
-
Bit 1
-
VID2
VID1
VENDOR ID
Bit 0
-
VID0
Type
R
R
R
R
R
R
R
R
SMBusTable: DEVICE ID
Byte 6 Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
Control Function
Device ID 7 (MSB)
Device ID 6
Device ID 5
Device ID 4
Device ID 3
Device ID 2
Device ID 1
Device ID 0
Type
RW
RW
RW
RW
RW
RW
RW
RW
SMBusTable: Byte Count Register
Byte 7 Pin #
Name
Bit 7
-
BC7
Bit 6
-
BC6
Bit 5
-
BC5
Bit 4
-
BC4
Bit 3
-
BC3
Bit 2
-
BC2
Bit 1
-
BC1
Bit 0
-
BC0
Control Function Type
RW
RW
Writing to this register ^RW
configures how many ^RW
bytes will be read back. ^RW
RW
RW
RW
0
1
Readback
Readback
Readback
Readback
Readback
Readback
Readback
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PWD
X
X
X
X
X
X
X
X
PWD
0
0
0
1
0
0
0
1
PWD
1
0
0
1
0
1
0
0
PWD
0
0
0
0
0
1
1
1
1255B—08/03/07
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