ICS9FG1904B-1 Datasheet, PDF (14/22 Pages) Integrated Circuit Systems – Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD

Integrated
Circuit
Systems, Inc.
ICS9FG1904B-1
General SMBus serial interface information for the ICS9FG1904B-1
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address *D0
(H)
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
Byte N + X -1
(see Note 2)
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address *D0 _(H)
• ICS clock will acknowledge
• Controller (host) sends the begining byte
location = N
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address *D1 _(H)
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X_(H)
was written to byte 8).
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
Index Block Write Operation
Controller (Host)
ICS (Slave/Receiver)
T
starT bit
Slave Address *D0_(H)
WR
WRite
ACK
Beginning Byte = N
ACK
Data Byte Count = X
ACK
Beginning Byte N
ACK
Byte N + X - 1
P
stoP bit
ACK
Index Block Read Operation
Controller (Host)
ICS (Slave/Receiver)
T
starT bit
Slave Address *D0_(H)
WR
WRite
ACK
Beginning Byte = N
ACK
RT
Repeat starT
Slave Address *D1_(H)
RD
ReaD
ACK
ACK
ACK
Data Byte Count = X
Beginning Byte N
* The SMBus Address of this device is programmable.
See the preceding page for details on how to set the
SMBus address.
1255B—08/03/07
N Not acknowledge
P
stoP bit
Byte N + X - 1
14