ICS9FG1904B-1 Datasheet, PDF (15/22 Pages) Integrated Circuit Systems – Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD

Integrated
Circuit
Systems, Inc.
ICS9FG1904B-1
SMBusTable: Gear Ratio Select Register
Byte 0 Pin #
Name
Control Function
Bit 7 DIF(14:0)
Group of 15 gear ratio enable
Bit 6 DIF(18:15)
Group of 4 gear ratio enable
Bit 5
-
Reserved
Bit 4
-
Gear Ratio FS4 (Inverse of FS_A_410 input!)
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Gear Ratio FS3
Gear Ratio FS2
Gear Ratio FS1
Gear Ratio FS0
Type
0
1
RW Gear Ratio
1:1
RW Gear Ratio
1:1
RW
RW
RW ^{See ICS9FG1904-1}
RW ^{Programmable Gear}
RW
Ratios Table
RW
PWD
1
1
1
Latch
1
0
1
1
SMBusTable: Output Control Register
Byte 1 Pin #
Name
Bit 7
DIF_7
Bit 6
DIF_6
Bit 5
DIF_5
Bit 4
DIF_4
Bit 3
DIF_3
Bit 2
DIF_2
Bit 1
DIF_1
Bit 0
DIF_0
Control Function Type
0
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1
SMBusTable: Output and PLL BW Control Register
Byte 2 Pin #
Name
Control Function Type
0
1
Bit 7 see note
PLL_BW# adjust
RW High BW Low BW
Bit 6 see note
BYPASS# test mode / PLL
RW Bypass
PLL
Bit 5
DIF_13
Output Control
RW
Hi-Z
Enable
Bit 4
DIF_12
Output Control
RW
Hi-Z
Enable
Bit 3
DIF_11
Output Control
RW
Hi-Z
Enable
Bit 2
DIF_10
Output Control
RW
Hi-Z
Enable
Bit 1
DIF_9
Output Control
RW
Hi-Z
Enable
Bit 0
DIF_8
Output Control
RW
Hi-Z
Enable
Note: Bit 7 is wired OR to the HIGH_BW# input, any 0 selects High BW
Note: Bit 6 is wired OR to the SMB_A2_PLLBYP# input, any 0 selects Fanout Bypass mode
PWD
1
1
1
1
1
1
1
1
SMBusTable: Output Enable Readback Register
Byte 3 Pin #
Name
Control Function
Bit 7
Readback - OE9# Input
Bit 6
Readback - OE8# Input
Bit 5
Readback - OE7# Input
Bit 4
Readback - OE6# Input
Bit 3
Readback - OE5# Input
Bit 2
Readback - OE_01234# Input
Bit 1
8
Readback - HIGH_BW# In
Bit 0
72
Readback - SMB_A2_PLLBYP# In
1255B—08/03/07
Type
R
R
R
R
R
R
R
R
0
1
Readback
Readback
Readback
Readback
Readback
Readback
Readback
Readback
PWD
X
X
X
X
X
X
X
X
15