ICSSSTUA32S869B Datasheet, PDF (1/18 Pages) Integrated Circuit Systems – 14-Bit Configurable Registered Buffer for DDR2

Integrated
Circuit
Systems, Inc.
ICSSSTUA32S869B
Advance Information
14-Bit Configurable Registered Buffer for DDR2
Recommended Application:
• DDR2 Memory Modules
• Provides complete DDR DIMM solution with
ICS97U877
• Ideal for DDR2 400, 533 and 667
Product Features:
• 14-bit 1:2 registered buffer with parity check
functionality
• Supports SSTL_18 JEDEC specification on data
inputs and outputs
• 50% more dynamic driver strength than standard
SSTU32864
• Supports LVCMOS switching levels on C1 and
RESET# inputs
• Low voltage operation
VDD = 1.7V to 1.9V
• Available in 150 BGA package
• Green packages available
Pin Configuration
1 2 3 4 5 6 7 8 9 10 11
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
150 Ball BGA
(Top View)
Functionality Truth Table
Inputs
Outputs
RESET# DCS# CSR# CK
Dn,
CK# DODT, Qn
DCKE
QCS#
QODT,
QCKE
H
L
L
↑
↓
L
L
L
L
H
L
L
↑
↓
H
H
L
H
H
L
L
L or H L or H
X
Q₀
Q₀
Q₀
H
L
H
↑
↓
L
L
L
L
H
L
H
↑
↓
H
H
L
H
H
L
H
L or H L or H
X
Q₀
Q₀
Q₀
H
H
L
↑
↓
L
L
H
L
H
H
L
↑
↓
H
H
H
H
H
H
L
L or H L or H
X
Q₀
Q₀
Q₀
H
H
H
↑
↓
L
Q₀
H
L
H
H
H
↑
↓
H
Q₀
H
H
H
H
H
L or H L or H
X
Q₀
Q₀
Q₀
L
X or
X or
X or
X or
X or
floating floating floating floating floating
L
L
L
1173—10/28/05
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.