IC-MB3 Datasheet, PDF (7/26 Pages) IC-Haus GmbH – BiSS INTERFACE MASTER, 1-Chan./3-Slaves

iC-MB3
BiSS INTERFACE MASTER, 1-Chan./3-Slaves
OPERATING REQUIREMENTS: µC Interface, INTEL mode
Operating conditions: CFGSPI = 0, INT_NMOT = 1
VDD = 3 ... 5.5V, Ta = -25 ... 85 °C; input levels lo = 0 ... 0.45 V, hi = 2.4 V ... VDD
Item Symbol Parameter
Conditions
I01 tsAA
I02 tAh
I03 tsCA
l04 thAA
l05 tsAW
l06 tWl
l07 tsDW
l08 thWD
l09 thWC
l10 thWA
thRA
l11 tsAR
l12 tRl
l13 tpRD1
l14 tpRD2
Setup Time:
Address stable before ALE hi6lo
Signal Duration:
ALE at high level
Setup Time:
NCS hi6lo until ALE hi6lo
Hold Time:
Address stable after ALE hi6lo
Setup Time:
ALE hi6lo until NWR_E hi6lo
Signal Duration:
NWR_E at low level
Setup Time:
Data stable before NWR_E lo6hi
Hold Time:
Data stable after NWR_E lo6hi
Hold Time:
NCS lo after NWR_E lo6hi
Hold Time:
ALE lo after NWR_E lo6hi
Setup Time:
ALE hi6lo until NRD_RNW hi6lo
Signal Duration:
NRD_RNW at low level
Propagation Delay:
Data stable after NRD_RNW hi6lo
Propagation Delay:
Data Bus high impedance after
NRD_RNW lo6hi
NCS = lo
Rev D1, Page 7/26
Fig.
Min.
3/4
15
3/4
10
3/4
10
3/4
15
3
0
3
10
3
15
3
0
3
0
3/4
15
4
0
4
70
4
0
4
0
Unit
Max.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
ns
25
ns
Figure 3: Write cycle (Intel Mode)
Figure 4: Read cycle (Intel Mode)