IC-MB3 Datasheet, PDF (16/26 Pages) IC-Haus GmbH – BiSS INTERFACE MASTER, 1-Chan./3-Slaves

iC-MB3
BiSS INTERFACE MASTER, 1-Chan./3-Slaves
Rev D1, Page 16/26
Configuration Register Communication
Address Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
224
Not used
225
Not used
226
Start Address
227
Count Of Bytes
228
Channel Select
229
SlaveID
-
-
WNR
-
-
-
-
-
-
-
-
-
-
-
-
REGADR(6:0)
-
REGNUM(5)
REGNUM(4:0)
CHSEL(8:1)
REGVERS
SLAVEID(2:0)
-
Bit 1
-
-
-
Bit 0
-
-
-
Configuration Master
Address Description
230
Frequency Division
231
Not used
232
Frequency Division
AutoGetsens
233
Not used
Device ID
234
Revision
235
Type
Configuration Channel
236
Slave Location
237
Mode of Operation
238
Mode of Operation
239
Not used
Key to the configuration bits:
S SELSSI:
S BiSSMOD:
Bit 7
-
Bit 6
-
-
-
Bit 5
-
-
Bit 4 Bit 3
FREQ(7:0)
-
-
FREQAGS(7:0)
-
-
0
0
0
0
0
1000 0011b
SELSSI4
SELSSI8
-
BiSSMOD4
BiSSMOD8
-
SELSSI3
SELSSI7
-
SLAVELOC(8:1)
BiSSMOD3 SELSSI2
BiSSMOD7 SELSSI6
-
-
Type of protocol: BiSS (0), SSI (1)
BiSS protocol model: BiSS model A or B (0), BiSS-A/S (1)
Bit 2
-
Bit 1
-
-
-
0
1
BiSSMOD2
BiSSMOD6
-
SELSSI1
SELSSI5
-
Bit 0
-
-
0
BiSSMOD1
BiSSMOD5
-
Status Information and Command Register
Address Description
Bit 7 Bit 6
240
241
242
243
244
245
246
247
248
249
250...255
Status Information
Validity Messages ^1,2)
Validity Messages ^1,2)
Register
Messages
Command
Register
Control Flages
Not used
Not used
Channel Status
Channel Status
Not used
nERR
SVALID4
SVALID8
CDM
TIMEOUT
BREAK
MAv0
-
-
REG4
REG8
-
nWDERR
d
d
REG ^{2, 4)}
UCREAD-
SENS
MAf0
-
-
SL4
SL8
-
Bit 5
d
SVALID3
SVALID7
REG-
BYTES(5)
SWRAM-
BANK
MAvS
-
-
REG3
REG7
-
Bit 4
nSENSERR
d
d
INIT
MAfS
-
-
SL3
SL7
-
Bit 3 Bit 2 Bit 1
nREGERR REGEND
d
SVALID2
d
SVALID1
SVALID6
d
SVALID5
REGBYTES(4:0)
REGCMD GETSENS0 GETSENS1
reserved
-
-
REG2
REG6
-
IDDQ ³⁾
-
-
SL2
SL6
-
IFTEST ³⁾
-
-
REG1
REG5
-
Reserved addresses for master devices featuring a higher slave or channel count, or more memory for register data.
1) Any attempt to write to this register sets register values to 0.
2) Two memory banks available.
3) iC-Haus device test only, set to 0.
4) For iC-MB3 the register bit REG is equal to REG1.
d Bit not relevant (don’t care).
Bit 0
EOT
d
d
AGS
CLKENI
-
-
SL1
SL5
-