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IC-TW2_13 Datasheet, PDF (25/28 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC
iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
TEST MODES
Rev E2, Page 25/28
The iC-TW2 provides various control bits located in dif-
ferent registers to enable or disable certain test modes.
The majority of these is only required for extended chip
testing capability, others are required for production
test.
GRANULAR
Addr. 0x05; bit 7
R/W
Code
Function, test mode only
0
normal operation
1
test mode only
Table 35: A/B output edge granularity control
VC(1:0)
Code
Addr. 0x0A; bit 6:5
R/W
Function, test mode only
register must be set to 0 for correct device
functionality
Table 36: Reference voltage fine tuning
CLKMODE
Addr. 0x0B; bit 0
R/W
Code
Function, test mode only
0
Select comparator clock default
1
Select direct oscillator clock
Table 37: Clock source select
CLKDLY
Addr. 0x0B; bit 2
R/W
Code
Function
0
Normal operation
1
Add clock delay
Table 38: Clock distribution delay line selection
Enabling the position monitor will allow access to the
internal absolute period position. The position can be
read through register 0x0F. This is considered a test
mode and should not be used during normal opera-
tion.
EN_MON
Addr. 0x0B; bit 3
R/W
Code
Function
0
Position monitor disabled default
1
Monitor enabled
Table 39: Position monitor control
MONITOR(7:0) Addr. 0x0F; bit 7:0
R/W
Code
Function
Access to the internal absolute period position. RT
only!
Table 40: Monitor register
EE_READ
Code
0
1
Addr. 0x0E; bit 7
W
Function
Normal operation
Read all iC-TW2 registers from the EEPROM. Bit is
automatically reset upon completion. Not required
during normal operation since this is done
automatically on start-up.
Table 41: EEPROM read command register
Production test control bits
Production test control bits are reserved bits. Do not
use the production test control bits during normal op-
eration. Keep reserved bits ”0”.
Reserved
Addr. 0xC; bit 7:1
R/W
Reserved
Addr. 0xD; bit 7:0
R/W
Reserved
Addr. 0xE; bit 2:0
R/W
Code
Function
0
Normal operation
1 ...
Do not use or alter to
Table 42: Test modes