IC-TW2_13 Datasheet, PDF (24/28 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC

iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
Rev E2, Page 24/28
1W-Interface
The 1W-Interface provides a write-only access port to
the register bank. It is intended as a minimal con-
figuration interface to program the internal EEPROM
during in-field service or production. An infrared pho-
totransistor can directly connect to the pin to build a
cost effective wireless write port. The input bit stream
is pulse-width modulated (or duty-cycle modulated) as
shown in Figure 19. A zero-bit is encoded as a short
low followed by a long high. A one-bit is encoded as a
long low followed by a short high. The modulated sig-
nal is independent of the receiver or transmitter clock
frequency. Since the iC-TW2 uses a free-running oscil-
lator, it is important to implement a robust, frequency-
insensitive protocol.
idle
0
1
1
0
0
idle
t
t
0low
0hi
t
t
1low
1hi
Figure 19: Pulse width modulated bit stream
The interface timing is specified in the following Table.
Parameter
t_0low
t_0hi
t_1low
t_1high
Description
Low time bit 0
High time bit 0
Low time bit 1
High time bit 1
min
40 µs
120 µs
120 µs
40 µs
max
100 µs
200 µs
200 µs
100 µs
Table 33: 1W-Interface timing
1W-Interface write sequence
Figure 20 describes the write sequence to the regis-
ter bank, which uses the same protocol as the 2W-
Interface. On an idle wire, a write sequence is initiated
by writing a start bit (1) followed by the write command
(00) followed by the address and register data. At the
end of the sequence, a stop-bit (0) is required.
1W-Interface write access to the EEPROM bank is
shown in Figure 21. The 4 bit EEPROM command af-
ter the start bit is decoded in Table 31.
Writing the register bank to the EEPROM
To permanently store a configuration in the internal
EEPROM the following procedure should be followed.
1. The 1W- / 2W-Interface is used to fully write the
desired configuration into the register bank.
2. A logic one is written to bit EE_WRITE of regis-
ter 0x0E. This will initiate a write sequence which
copies all registers into the internal EEPROM. A
complete write takes 100 ms. During this time,
no access to the register bank through either the
1W- / 2W-Interface is allowed or data corruption
might occur.
3. Finally the register content, after a device reset
and configuration, should be verified to ensure a
successfull EEPROM write sequence.
Writing the registers to the EEPROM using EE_WRITE
takes up to 100 msec. During this access to the reg-
ister bank either through the 1W- or 2W-Interface is
prohibited. Any access will corrupt data written to the
EEPROM.
EE_WRITE
Addr. 0x0E; bit 6
W
Code
Function, bit is automatically reset upon completion
of operation
0
Normal operation (default)
1
Store registers into EEPROM
Table 34: EEPROM store command
idle 1 0 0 address(4:0)
data(7:0)
0 idle
Start Write to Register bank
Bit Regbank address
8 bit register data
Stop
Bit
Figure 20: 1W-Interface register bank write se-
quence
idle 1 c 1 e b address(2:0)
data(31:0)
0
idle
Start
Bit
EEPROM
command
EEPROM bank
address
32 bit EEPROM
data
Stop
Bit
Figure 21: 1W-Interface EEPROM write sequence