IC-TW2_13 Datasheet, PDF (15/28 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC

iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
INDEX GATING
Rev E2, Page 15/28
The iC-TW2 can interface to a wide range of index gat-
ing sources. Most commonly used are the digital Hall
sensor and the MR sensor bridge.
The digital Hall sensor provides a large swing input sig-
nal to the iC-TW2. Depending on the polarity of the
Hall it is either connected to pin NINZ or PINZ. Most
Hall sensors use an open drain stage pulling the out-
put low in the presence of a magnetic field. The un-
used terminal PINZ or NINZ should be biased to an
adequate mid voltage level to guarantee good noise
margin. The iC-TW2 provides a constant 1.21 V at pin
VC that can be used for this purpose (refer to Figure
7).

 
 
  
  

TW2 provides offset control capability to fine tune the
threshold voltage of the index comparator. This greatly
simplifies end product calibration as variation in sensor
offset can be compensated for.
Figure 9 shows a correctly set threshold when using
an MR gating sensor. The side lobes are below the
threshold line and no parasitic triggering occurs.
Signal of MR
Index Sensor
internal threshold
Pin B_V
(A)
(B)
tsetup
thold
Pin Z_W
Internal gating window
observed during index
calibration (mode 2).
Gated index output,
1 increment wide.
Figure 9: Index gating and calibration
Figure 7: Digital Hall sensor index configuration

 
 
 

Figure 8: MR sensor index configuration
An MR sensor differential bridge can also be used to
gate the index. Typically, the MR sensor provides a
small signal amplitude. In addition, residual side lobes
are present that can trigger double indexing. The iC-
Index gating should be calibrated at sine/cosine input
frequencies below 5 kHz to minimize the effect of la-
tency. Timings shown in Table 17 are valid for input
frequencies below 5 kHz and f_system of 25 MHz. Once
the timings are satisfied according to Table 17, correct
operation is guaranteed up to the maximum input fre-
quency as specified in Table 26 on page 18.
Parameter Description
Condition
*
t_setup
Index window setup time no filter
before rising edge of
8 average
Z_W
16 average
t_hold
Index window hold time no filter
after falling edge of Z_W 8 average
16 average
*) According to register FILTER(1:0)
f_system = 25 MHz, all timings scale with f_system.
Refer to Table 26 for more information
min
0.4 µs
0.5 µs
0.7 µs
0.4 µs
0.5 µs
0.7 µs
Table 17: Index gating and timing