IC-TW2_13 Datasheet, PDF (11/28 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC

iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
INPUT STAGE
Rev E2, Page 11/28
Programmable Gain Amplifier
A programmable gain amplifier (PGA) with output re-
ferred offset adjustment is used as input stage, shown
in Figure 3. The coarse gain is common for both
channel A and B and is programmed through register
GC(2:0).
Fine tuning gain is applied individually to channel
A and B by programming registers GFA(1:0) and
GFB(1:0) respectively.
PINB
NINB
PINA
NINA
Input
amplifier
+ ^GFB(1:0)
-
GC(2:0)
+
- _GFA(1:0)
OFSB(5:0)
+
Xb
to interpolation
engine
+
Xa
OFSA(5:0)
Figure 3: Input stage
GC(2:0)
Code
000
001
010
011
100
101
110
111
Addr. 0x07; bit 2:0
R/W
Input Signal Range V_{IN peak-peak} [ V_{IN peak-peak diff.} ]
400 mV - 750 mV [ 800 mV - 1.5 V ]
400 mV max. @VDD = 3.0 V
200 mV - 400 mV
100 mV - 200 mV
50 mV - 100 mV
25 mV - 50 mV
12.5 mV - 25 mV
5 mV - 12.5 mV
not defined (defaults to eeprom setting)
are sign magnitude encoded. Input referred offset be-
comes gain dependent and is defined as follows:
13 mV ∗ OFSA(5 : 0)
V _{OFS (A input referred)} =
GC(2 : 0)
OFSA(5:0)
OFSB(5:0)
Code
111111
111110
100001
100000
000000
000001
011110
011111
Addr. 0x08; bit 5:0
R/W
Addr. 0x09; bit 5:0
R/W
Offset Correction (defaults to eeprom setting)
maximum negative adjust: -403 mV
-390 mV
-13 mV
no correction
no correction
13 mV
390 mV
maximum positive adjust: 403 mV
Table 7: Offset control of channel A/B
Consider Table 8 regarding the relationship between
coarse gain, permissible peak-to-peak input amplitude
and the resulting offset correction range.
Coarse
Gain
GC(2:0)
0
1
2
3
4
5
6
Input Signal Range
V_{IN peak-peak}
400 mV - 750 mV
400 mV max. @3 V
200 mV - 400 mV
100 mV - 200 mV
50 mV - 100 mV
25 mV - 50 mV
12.5 mV - 25 mV
5 mV - 12.5 mV
Input-referred
offset corr. range
V_{OFS max}
± 806 mV
± 403 mV
± 202 mV
± 101 mV
± 50 mV
± 25 mV
± 12.6 mV
Input-ref.
offset step
dV_OFS
26 mV
13 mV
6.5 mV
3.25 mV
1.63 mV
0.81 mV
0.41 mV
Table 8: Input signal and offset correction ranges.
Table 5: Coarse gain control of channel A/B
5V
GFA(1:0)
Addr. 0x07; bit 4:3
R/W
GFB(1:0)
Addr. 0x07; bit 6:5
R/W
Code
Fine Gain (defaults to eeprom setting)
00
0 dB
01
0.7 dB
10
1.4 dB
11
2.1 dB
Table 6: Fine gain control of channel A/B
4V
3V
+IN
-IN
2V
VIN
1V
VDD= 4.5 V
3.3 V
VCM
VOFS
1.4 V
Offset Adjustment
Offset adjustment is provided at the output of the input
amplifier. It is individually programmed through regis-
ter OFSA(5:0) and OFSB(5:0). Adjustment is made in
steps of 13 mV and the corresponding register values
Figure 4: Permissible input voltage range at
VDD = 5 V +/- 10 %.