IC-MSB Datasheet, PDF(25/29 Page) IC-Haus GmbH – SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER

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IC-MSB Datasheet, PDF (25/29 Pages) IC-Haus GmbH – SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER

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iC-MSBSAFETY, iC-MSB2

SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER

ERROR MONITORING AND ALARM OUTPUT

Rev D2, Page 25/29

The following table gives the errors which can both

be recognized by iC-MSB and enabled either for mes-

saging, output shutdown or protocol in the EEPROM.

Mask EMASKA stipulates that errors should be sig-

naled at pin ERR, mask EMASKO determines whether

the line driver outputs are to be shutdown or not

(with PDMODE setting a renewed power-on) and mask

EMASKE governs the storage of error events in the

EEPROM.

EMASKA

EMASKO

EMASKE

Bit

Note

Adr 0x14, bit 6:0

Adr 0x16, bit 6:0

Adr 0x18, bit 2:0; Adr 0x17, bit 7:4

Error Event

Conï¬guration error*: SDA or SCL pin error, no Ack

signal from EEPROM or invalid check sum

Excessive temperature warning

External system error

Level controller out of range (max. limit)

Level controller out of range (min. limit)

Signal clipping (excessive input level)

Loss of signal (poor input level or CH1/CH2 phase

out of range)

*) The line drivers remain high impedance (tristate)

when cycling power.

Table 48: Error Event Masks

Error Protocol

Out of the errors pinpointed by EMASKE both the ï¬rst

(ERR1) and last error (ERR2) which occur after the

iC-MSB is turned on are stored in the EEPROM. The

EEPROM also has a memory area in which all occur-

ring errors can be stored (ERR3). Only the fact that an

error has occurred can be recorded, with no informa-

tion as to the time and frequency of that error given.

The EEPROM memory can be used to statistically

evaluate the causes of system failure, for example.

ERR1

ERR2

ERR3

Bit

9:0

Adr 0x20, bit 6:0

Adr 0x22, bit 0; Adr 0x21, bit 7:2

Adr 0x23, bit 2:0; Adr 0x22, bit 7:4

Error Event

Assignation according to EMASKE

I/O pin ERR

Pin ERR is operated by a current-limited open drain

output driver and has an internal pull-up which can be

shutdown. The ERR pin also acts as an input for ex-

ternal system error messaging and for switching iC-

MSB to test mode for which a voltage of greater than

VTMon must be applied. Interpretation of external

system error messaging and the phase length of the

message output can be set using EPH; the minimum

signaling duration for internal errors is adjusted using

EMTD(2:0).

EPU

Code

Adr 0x17, bit 2

Function

without internal pull-up at ERR

internal pull-up at ERR active

Table 50: Alarm Output Pull-up Enable

PDMODE

Code

Adr 0x18, bit 6

Function

Line driver active when no error persists

Line driver active after power-on

Table 51: Driver Activation

EPH

Code

Adr 0x15, bit 2

ERR pin function

with error low,

otherwise Z

with error Z,

otherwise low

Ext. error message

with error low,

otherwise pull-up active

with error pull-up active,

otherwise low

Table 52: Alarm Input/Output Logic

EMTD

Code

0x0

0x1

0x2

0x3

Adr 0x15, bit 5:3

Indication Time

0 ms

12.5 ms

25 ms

37.5 ms

Code

0x4

0x5

0x6

0x7

Indication Time

50 ms

62.5 ms

75 ms

87.5 ms

Table 53: Minimum Alarm Indication Time

Code

Function

No event

Registered error event

Table 49: Error Protocol

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