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GMS82524 Datasheet, PDF (91/93 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS
HYUNDAI MicroElectronics
GMS82512/16/24
Branch / Jump Operation
NO.
MNENONIC
OP BYTE CYCLE
CODE NO. NO
OPERATION
FLAG
NVGBHIZC
1 BBC A.bit,rel
y2
2
4/6 Branch if bit clear :
2 BBC dp.bit,rel y3
3
5/7 if(bit) = 0, then PC  PC + rel
--------
3 BBS A.bit,rel
x2
2
4/6 Branch if bit clear :
4 BBS dp.bit,rel x3
3
5/7 if(bit) = 1, then PC  PC + rel
--------
5 BCC rel
Branch if carry bit clear :
50
2
2/4 if(C) = 0, then PC  PC + rel
MM - - - - Z -
6 BCS rel
D0
2
2/4 Branch if carry bit set : If (C) =1, then PC  PC + rel - - - - - - - -
7 BEQ rel
F0
2
2/4 Branch if equal : if (Z) = 1, then PC  PC + rel
--------
8 BMI rel
90
2
2/4 Branch if munus : if (N) = 1, then PC  PC + rel
--------
9 BNE rel
70
2
2/4 Branch if not equal : if (Z) = 0, then PC  PC + rel
--------
10 BPL rel
10
2
2/4 Branch if not minus : if (N) = 0, then PC  PC + rel
--------
11 BRA rel
2F
2
4
Branch always : PC  PC + rel
--------
12 BVC rel
30
2
2/4 Branch if overflow bit clear :
If (V) = 0, then PC  PC + rel
--------
13 BVS rel
B0
2
2/4 Branch if overflow bit set :
If (V) = 1, then PC  PC + rel
--------
14 CALL !abs
3B
3
8
Subroutine call
15 CALL [dp]
5F
2
8
M(SP)(PCH), SPSP-1, M(SP)(PCL), SPSP-1 - - - - - - - -
if !abs, PC  abs ; if [dp], PCL  (dp), PCH  (dp+1)
16 CBNE dp,rel
FD
3
5/7 Compare and branch if not equal ;
17
CBNE dp + X,
rel
8D
3
6/8 If A ≠ (M), then PC  PC + rel.
--------
18 DBNE dp,rel AC
3
5/7 Decrement and branch if not equal :
19 DBNE Y,rel
7B
2
4/6 if (M) ≠ 0, then PC  PC + rel.
20 JMP !abs
1B
3
3
Unconditional jump
--------
21 JMP [!abs]
1F
3
5
PC  jump address
--------
22 JMP [dp]
3F
2
4
23 PCALL
4F
2
6
U-page call : M(SP)  (PCH), SP  SP -1,
M(SP)  (PCL), SP  SP -1,
--------
24 TCALL n
nA
1
PCL  (upage), PCH  "OFFH"
8
Table call :
M(SP)  (PCH), SP  SP -1,
M(SP)  (PCL), SP  SP -1
--------
PCL  (Table vector L), PCH  (Table vector H)
Control Operation & etc.
NO. MNENONIC
1 BRK
2 DI
3 EI
4 NOP
OP
CODE
0F
60
E0
FF
BYTE CYCLE
NO. NO
1
8
1
3
1
3
1
2
OPERATION
Software interrupt:
B  “1”, M(SP)  (PCH), SP  SP - 1,
M(s)  (PCL), SP  S - 1, M(SP)  PSW,
SP  SP - 1, PCL  (0FFDEH), PCH  (0FFDFH)
Disable interrupts : I  “0”
Enable interrupts : I  “1”
No operation
FLAG
NVGBHIZC
---1-0--
-----0--
-----1--
--------
FEB. 2000 Ver 1.00
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