GMS82524 Datasheet, PDF (46/93 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

HYUNDAI MicroElectronics
GMS82512/16/24
12. ANALOG DIGITAL CONVERTER
The analog-to-digital converter (A/D) allows conversion
of an analog input signal to a corresponding 8-bit digital
value. The A/D module has eight analog inputs, which are
multiplexed into one sample and hold. The output of the
sample and hold is the input into the converter, which gen-
erates the result via successive approximation. The analog
supply voltage is connected to AV_DD of ladder resistance
of A/D module.
The A/D module has two registers which are the control
register ADCM and A/D result register ADR. The register
ADCM, shown in Figure 12-2, controls the operation of
the A/D converter module. The port pins can be configured
as analog inputs or digital I/O. To use analog inputs, I/O is
selected input mode by R3DD or R6DD direction register.
How to Use A/D Converter
The processing of conversion is start when the start bit
ADST is set to “1”. After one cycle, it is cleared by hard-
ware. The register ADR contains the results of the A/D
conversion. When the conversion is completed, the result
is loaded into the ADR, the A/D conversion status bit
ADSF is set to “1”, and the A/D interrupt flag AIF is set.
The block diagram of the A/D module is shown in Figure
12-1. The A/D status bit ADSF is set automatically when
A/D conversion is completed, cleared when A/D conver-
sion is in process. The conversion time takes maximum 20
uS (at f_XIN=8 MHz).
AV_DD
“0”
“1”
ADEN
R30/AN0
R31/AN1
R32/AN2
R33/AN3
R64/AN4
R65/AN5
R66/AN6
R67/AN7
ADS[2:0]
000
001
010
011
100
101
110
111
S/H
Sample & Hold
SUCCESSIVE
APPROXIMATION
CIRCUIT
ADIF
A/D
INTERRUPT
ADR
A/D result register
ADDRESS: E9_H
RESET VALUE: Undefined
Figure 12-1 A/D Block Diagram
FEB. 2000 Ver 1.00
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