GMS82524 Datasheet, PDF (76/93 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS82512/16/24
HYUNDAI MicroElectronics
INT0S
EQU
0,0D0H
;external int.0 selection
;
PMR5
EQU
0D1H
;port R5 mode register
BUZS
EQU
5,0D1H
;buzzer selection
WDTS
EQU
4,0D1H
;watch dog timer selection
;
CKCTLR EQU
0D3H
;clock control register
BITR
EQU
0D3H
;basic interval timer register
;
WDTR
EQU
0E0H
;watch dog timer register
;
TM0
EQU
0E2H
;timer0 mode register
TM2
EQU
0E3H
;timer2 mode register
;
TDR0
EQU
0E4H
;tomer0 data register
TDR1
EQU
0E5H
;tomer1 data register
TDR2
EQU
0E6H
;tomer2 data register
TDR3
EQU
0E7H
;tomer3 data register
;
ADCM
EQU
0E8H
;A/D Converter mode register
ADR
EQU
0E9H
;A/D con. register
;
BUR
EQU
0ECH
;buzzer data register
;
IENL
EQU
0F4H
;int. enable register low
AE
EQU
7,0F4H
;A/D con. int. enable
WDTE
EQU
6,0F4H
;W.D.T. int. enable
BITE
EQU
5,0F4H
;B.I.T. int. enable
;
IRQL
EQU
0F5H
;int. request flag register low
AR
EQU
7,0F5H
;A/D con. int. request flag
WDTRF
EQU
6,0F5H
;W.D.T. int. request flag
BITRF
EQU
5,0F5H
;B.I.T. int. request flag
;
IENH
EQU
0F6H
;int. enable register high
INT0E
EQU
7,0F6H
;external int.0 enable
INT1E
EQU
6,0F6H
;external int.1 enable
INT2E
EQU
5,0F6H
;external int.2 enable
INT3E
EQU
4,0F6H
;external int.3 enable
T0E
EQU
3,0F6H
;timer0 int. enable
T1E
EQU
2,0F6H
;timer1 int. enable
T2E
EQU
1,0F6H
;timer2 int. enable
T3E
EQU
0,0F6H
;timer3 int. enable
;
IRQH
EQU
0F7H
;int. request flag register high
INT0R
EQU
7,0F7H
;external int.0 request flag
INT1R
EQU
6,0F7H
;external int.1 request flag
INT2R
EQU
5,0F7H
;external int.2 request flag
INT3R
EQU
4,0F7H
;external int.3 request flag
T0R
EQU
3,0F7H
;timer0 int. request flag
T1R
EQU
2,0F7H
;timer1 int. request flag
T2R
EQU
1,0F7H
;timer2 int. request flag
T3R
EQU
0,0F7H
;timer3 int. request flag
;
IEDS
EQU
0F8H
;external int. edge selection
PFDR
EQU
0F9H
;power fail detection register
;
;*********** MACRO DEFINITION ************
;
REG_SAVE
MACRO
;Save Registers to Stacks
PUSH
A
PUSH
X
PUSH
Y
ENDM
;
REG_RESTORE MACRO
;Restore Register from Stacks
POP
Y
POP
X
POP
A
ENDM
;
;*********** CONSTANT DEFINITION ***********
;
SEG_PORT
EQU
R0
;7-Segment Output Port
STROBE_PORT EQU
R2
;Strobe Signal Port
;
;**************************************************************************
;
RAM
ALLOCATION
*
;**************************************************************************
iii
FEB. 2000 Ver 1.00