HY57V281620ET Datasheet, PDF(8/13 Page) Hynix Semiconductor – 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

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HY57V281620ET Datasheet, PDF (8/13 Pages) Hynix Semiconductor – 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

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Synchronous DRAM Memory 128Mbit (8Mx16bit)

HY57V281620E(L)T(P) Series

CAPACITANCE (TA= 0 to 70 oC, f=1MHz, VDD=3.3V)

Parameter

Input capacitance

CLK

A0 ~ A11, BA0, BA1, CKE, CS, RAS, CAS,

WE, LDQM, UDQM

Data input / output capacitance DQ0 ~ DQ15

Symbol Min Max Unit

CI1

2.0 4.0 pF

CI2

2.5 5.0 pF

CI/O

3.0 5.5 pF

DC CHARACTERISTICS I (TA= 0 to 70oC)

Parameter

Symbol

Min

Input Leakage Current

ILI

-1

Output Leakage Current

ILO

-1

Output High Voltage

VOH

2.4

Output Low Voltage

VOL

Note:

1. VIN = 0 to 3.3V, All other balls are not tested under VIN =0V

2. DOUT is disabled, VOUT=0 to 3.6

Max

0.4

Unit

Note

IOH = -2mA

IOL = +2mA

Rev. 1.1 / Jan. 2005

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