GMS81C1404 Datasheet, PDF (68/93 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C1404/GMS81C1408
Release the STOP mode
The exit from STOP mode is hardware reset or external in-
terrupt. Reset re-defines all the Control registers but does
not change the on-chip RAM. External interrupts allow
both on-chip RAM and Control registers to retain their val-
ues. If I-flag = 1, the normal interrupt response takes place.
If I-flag = 0, the chip will resume execution starting with
the instruction following the STOP instruction. It will not
vector to interrupt service routine. (refer to Figure 19-1 )
By reset, exit from Stop mode is shown in Figure 19-3
.When exit from Stop mode by external interrupt, enough
oscillation stabilization time is required to normal opera-
tion. Figure 19-2 shows the timing diagram. When release
the Stop mode, the Basic interval timer is activated on
wake-up. It is increased from 00_H until FF_H . The count
overflow is set to start normal operation. Therefore, before
STOP instruction, user must be set its relevant prescaler di-
vide ratio to have long enough time (more than 20msec).
This guarantees that oscillator has started and stabilized..
STOP
INSTRUCTION
STOP Mode
Interrupt Request
Corresponding Interrupt
Enable Bit (IENH, IENL)
IEXX
=0
=1
STOP Mode Release
Master Interrupt
Enable Bit PSW[2]
I-FLAG
=0
=1
Interrupt Service Routine
Next
INSTRUCTION
Figure 19-1 STOP Releasing Flow by Interrupts
Oscillator
(X_IN pin)
Internal
Clock
External
Interrupt
BIT
Counter
STOP Instruction Execution
N-2 N-1 N N+1
Normal Operation
N+2
STOP Mode
Clear Basic Interval Timer
00 01
FE FF 00 00
Stabilizing Time
t_ST > 20mS
Normal Operation
Figure 19-2 Timing of STOP Mode Release by External Interrupt
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June. 2001 Ver 1.2