HMT425S6MFR6A Datasheet, PDF (34/53 Pages) Hynix Semiconductor – DDR3L SDRAM Unbuffered SODIMMs Based on 4Gb M-die

DDR3L-1600 Speed Bins
For specific Notes See "Speed Bin Table Notes" on page 35.
Speed Bin
DDR3L-1600K
CL - nRCD - nRP
Parameter
Symbol
Internal read
command to first data
t_AA
ACT to internal read or
write delay time
t_RCD
PRE command period t_RP
ACT to ACT or REF
command period
t_RC
ACT to PRE command
period
t_RAS
CL = 5
CL = 6
CWL = 5
CWL = 6, 7
CWL = 5
CWL = 6
CWL = 7
CWL = 5
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
CL = 7
CL = 8
CWL = 6
CWL = 7
CWL = 8
CWL = 5
CWL = 6
CWL = 7
CWL = 8
CWL = 5, 6
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
CL = 9 CWL = 7 t_CK(AVG)
CWL = 8 t_CK(AVG)
CWL = 5, 6 t_CK(AVG)
CL = 10 CWL = 7 t_CK(AVG)
CWL = 8 t_CK(AVG)
CL
=
11
CWL =
CWL
5, 6,7
=8
t_CK(AVG)
t_CK(AVG)
Supported CL Settings
Supported CWL Settings
min
13.75
(13.125)^5,9
13.75
(13.125)^5,9
13.75
(13.125)^5,9
48.75
(48.125)^5,9
35
11-11-11
max
20
—
—
—
9 * tREFI
3.0
3.3
Reserved
2.5
3.3
Reserved
Reserved
Reserved
1.875
< 2.5
(Optional)^5,9
Reserved
Reserved
Reserved
1.875
< 2.5
Reserved
Reserved
Reserved
1.5
<1.875
(Optional)^5,9
Reserved
Reserved
1.5
<1.875
Reserved
Reserved
1.25
<1.5
5, 6, (7), 8, (9), 10, 11
5, 6, 7, 8
Rev. 1.0 / Jul. 2012
Unit
Note
ns
ns
ns
ns
ns
ns
1, 2, 3, 4,
8, 10
ns
4
ns
1, 2, 3, 8
ns
1, 2, 3, 4, 8
ns
4
ns
4
ns
1, 2, 3, 4, 8
ns
1, 2, 3, 4, 8
ns
4
ns
4
ns
1, 2, 3, 8
ns
1, 2, 3, 4, 8
ns
1, 2, 3, 4
ns
4
ns
1, 2, 3, 4, 8
ns
1, 2, 3, 4
ns
4
ns
1, 2, 3, 8
ns
1, 2, 3, 4
ns
4
ns
1, 2, 3
n_CK
n_CK
34