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HMT425S6MFR6A Datasheet, PDF (22/53 Pages) Hynix Semiconductor – DDR3L SDRAM Unbuffered SODIMMs Based on 4Gb M-die | |||
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Cross point voltage for differential input signals (CK, DQS)
Symbol
Parameter
DDR3L-800, 1066, 1333, 1600
Min
Max
VIX(CK)
Differential Input Cross Point Voltage
relative to VDD/2 for CK, CK
-150
150
VIX(DQS)
Differential Input Cross Point Voltage
relative to VDD/2 for DQS, DQS
-150
150
Notes:
1. The relation between Vix Min/Max and VSEL/VSEH should satisfy following.ï
(VDD/2) + Vix (Min) - VSEL ï³ 25mV ï
VSEH - ((VDD/2) + Vix (Max)) ï³ 25mV
Unit Notes
mV 1
mV 1
Slew Rate Definitions for Single-Ended Input Signals
See 7.5 âAddress / Command Setup, Hold and Deratingâ in âDDR3L Device Operationâ for single-ended
slew rate definitions for address and command signals.
ï
See 7.6 âData Setup, Hold and Slew Rate Deratingâ in âDDR3L Device Operationâ for single-ended slew
rate definition for data signals.
Rev. 1.0 / Jul. 2012
22
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