HMT425S6MFR6A Datasheet, PDF (26/53 Pages) Hynix Semiconductor – DDR3L SDRAM Unbuffered SODIMMs Based on 4Gb M-die

Differential Output Slew Rate
With the reference load for timing measurements, output slew rate for falling and rising edges is defined
and measured between VOLdiff (AC) and VOHdiff (AC) for differential signals as shown in table and Figure
below.
Differential Output Slew Rate Definition
Description
Measured
From
To
Defined by
Differential output slew rate for rising edge
Differential output slew rate for falling edge
Notes:
V_{OLdiff (AC)}
V_{OHdiff (AC)}
V_{OHdiff (AC)}
V_{OLdiff (AC)}
[V_{OHdiff (AC)}-V_{OLdiff (AC)}] / DeltaTRdiff
[V_{OHdiff (AC)}-V_{OLdiff (AC)}] / DeltaTFdiff
1. Output slew rate is verified by design and characterization, and may not be subject to production test.
Delta
TFdiff
Delta
TRdiff
VOHdiff(AC)
O
VOLdiff(AC)
Differential Output slew Rate Definition
Differential Output Slew Rate
DDR3L-800 DDR3L-1066
Parameter
Symbol Min Max Min Max
Differential Output Slew Rate
Description: SR; Slew Rate
SRQdiff 3.5 12 3.5 12
Q: Query Output (like in DQ, which stands for Data-in, Query-Output)
diff : Differential Signals
For Ron = RZQ/7 setting
DDR3L-1333
Min Max
3.5 12
DDR3L-1600
Min Max
3.5 12
Units
V/ns
Rev. 1.0 / Jul. 2012
26