HY29F002T Datasheet, PDF (33/38 Pages) Hynix Semiconductor – 2 Megabit (256K x 8), 5 Volt-only, Flash Memory

AC CHARACTERISTICS
HY29F002T
Alternate CE# Controlled Erase/Program Operations
Parameter
JEDEC Std
Description
Speed Option
Unit
- 45 - 55 - 70 - 90
t_AVAV
t_AVWL
t_WLAX
t_DVWH
t_WHDX
t_GHEL
t_WLEL
t_EHWH
t_ELEH
t_EHEL
t_WHWH1
t_WC Write Cycle Time (Note 1)
t_AS Address Setup Time
t_AH Address Hold Time
t_DS Data Setup Time
t_DH Data Hold Time
t_GHEL Read Recovery Time Before Write
t_WS WE# Setup Time
t_WH WE# Hold Time
t_CP CE# Pulse Width
t_CPH CE# Pulse Width High
t_WHWH1 Byte Programming Operation (Notes 1, 2, 3)
Min 45 55 70 90 ns
Min
0
ns
Min 40 45 45 45 ns
Min 25 25 30 45 ns
Min
0
ns
Min
0
ns
Min
0
ns
Min
0
ns
Min 30 30 35 45 ns
Min
20
ns
Typ
7
µs
Max
300
µs
Typ
1.8
sec
Chip Programming Operation (Notes 1, 2, 3, 5)
Max
5.4
sec
t_WHWH2 t_WHWH2 Sector Erase Operation (Notes 1, 2, 4)
Typ
1
sec
Max
8
sec
t_WHWH3 t_WHWH3 Chip Erase Operation (Notes 1, 2, 4)
Typ
7
sec
Max
55
sec
Erase and Program Cycle Endurance
Typ
1,000,000
cycles
Min
100,000
cycles
Notes:
1. Not 100% tested.
2. Typical program and erase times assume the following conditions: 25 °C, V_CC = 5.0 volts, 100,000 cycles. In addition,
programming typicals assume a checkerboard pattern. Maximum program and erase times are under worst case condi-
tions of 90 °C, V = 4.5 volts (4.75 volts for 55 ns version), 100,000 cycles.
CC
3. Excludes system-level overhead, which is the time required to execute the four-bus-cycle sequence for the program
command. See Table 5 for further information on command sequences.
4. Excludes 0x00 programming prior to erasure. In the preprogramming step of the Automatic Erase algorithm, all bytes
are programmed to 0x00 before erasure.
5. The typical chip programming time is considerably less than the maximum chip programming time listed since most
bytes program faster than the maximum programming times specified. The device sets DQ[5] = 1 only If the maximum
byte program time specified is exceeded. See Write Operation Status section for additional information.
Rev. 4.1/May 01
33