HMT112V7AFP8C-G7 Datasheet, PDF (3/25 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM VLP Registered DIMM

Table of Contents
1. Description
1.1 Device Features and Ordering Information
1.1.1 Features
1.1.2 Ordering Information
1.2 Speed Grade & Key Parameters
1.3 Address Table
2. Pin Architecture
2.1 Pin Definition
2.2 Input/Output Functional Description
2.3 Pin Assignment
3. Functional Block Diagram
3.1 1GB, 128Mx72 Module(1Rank of x8)
3.2 2GB, 256Mx72 Module(2Rank of x8)
3.3 2GB, 256Mx72 Module(1Rank of x4)
3.4 4GB, 512Mx72 Module(2Rank of x4)
4. Input/Output Capacitance & AC Parametrics
5. IDD Specifications
6. DIMM Outline Diagram
6.1 1GB, 128Mx72 Module(1Rank of x8)
6.2 2GB, 256Mx72 Module(2Rank of x8)
6.3 2GB, 256Mx72 Module(1Rank of x4)
6.4 4GB, 512Mx72 Module(2Rank of x4)
Rev. 0.2 / December 2008
3