HMT112V7AFP8C-G7 Datasheet, PDF (12/25 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM VLP Registered DIMM

3.2 2GB, 256Mx72 Module(2Rank of x8)
DQS8_t
DQS_t
DQS8_c
DQS_c
DM8/DQS17_t
TDQS_t
DQS17_c
TDQS_c
D8
CB[7:0]
DQ [7:0]
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D17
DQS4_t
DQS_t
DQS4_c
DQS_c
DM4/DQS13-t
TDQS_t
DQS13_c
TDQS_c
D4
DQ[39:32]
DQ [7:0]
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D13
DQS3_t
DQS_t
DQS3_c
DQS_c
DM3/DQS12_t
TDQS_t
DQS12_c
TDQS_c
D3
DQ[31:24]
DQ [7:0]
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D12
DQS5_t
DQS_t
DQS5_c
DQS_c
DM5/DQS14_t
TDQS_t
DQS14_
TDQS_c
D5
DQ[47:40]
DQ [7:0]
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D14
DQS2_t
DQS_t
DQS2_c
DQS_c
DM2/DQS11_t
TDQS_t
DQS11_c
TDQS_c
D2
DQ[23:16]
DQ [7:0]
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D11
DQS6_t
DQS_t
DQS6_c
DQS_c
DM6/DQS15_t
TDQS_t
DQS15_c
TDQS_c
D6
DQ55:48]
DQ [7:0]
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D15
DQS1_t
DQS_t
DQS1_c
DQS_c
DM1/DQS10_t
TDQS_t
DQS10_c
DQ[15:8]
TDQS_c
DQ [7:0]
D1
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D10
DQS7_t
DQS_t
DQS7_c
DQS_c
DM7/DQS16_t
TDQS_t
DQS16_c
DQ[63:56]
TDQS_c
DQ [7:0]
D7
ZQ
DQS_t
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
ZQ
D16
DQS0_t
DQS_t
DQS0_c
DQS_c
DM0/DQS9_t
TDQS_t
DQS9_c
TDQS_c
D0
DQ[7:0]
DQ [7:0]
ZQ
DQS_t
Vtt
DQS_c
TDQS_t
TDQS_c
DQ [7:0]
D9
ZQ
Vtt
Note:
1. DQ-to-I/O wiring may be changed within a byte.
2. Unless otherwise noted, resistor values are 15ʃ ‚ %.
3. ZQ resistors are 240ʃ ‚ %. For all other resistor values
refer to the appropriate wiring diagram.
4. See the wiring diagrams for all resistors associated with the
command, address and control bus.
VDDSPD
VDDSPD
SA0
SA0
EVENT_n
EVENT SPD with SA1
SA1
SCL
SCL ^Integrated SA2
SA2
SDA
SDA
TS
VSS
VSS
Plan to use SPD with Integrated TS of Class B and
might be changed on customer’s requests. For more
details of SPD and Thermal sensor, please contact
local Hynix sales representative
V_DDSPD
VDD
V_TT
VREFCA
VREFDQ
VSS
Serial PD
D0–D17
D0–D17
D0–D17
D0–D17
D0–D17
Rev. 0.2 / December 2008
12