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HY27UH08AG5M Datasheet, PDF (10/49 Pages) Hynix Semiconductor – 16Gbit (2Gx8bit) NAND Flash
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HY27UH08AG(5/D)M Series
16Gbit (2Gx8bit) NAND Flash
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
5th Cycle
IO0
A0
A8
A12
A20
A28
IO1
A1
A9
A13
A21
A29
IO2
A2
A10
A14
A22
A30
IO3
A3
A11
A15
A23
L(1)
IO4
A4
L(1)
A16
A24
L(1)
IO5
A5
L(1)
A17
A25
L(1)
IO6
A6
L(1)
A18
A26
L(1)
IO7
A7
L(1)
A19
A27
L(1)
1. L must be set to Low.
Table 3: Address Cycle Map(2CE & Dual)
FUNCTION
READ 1
READ FOR COPY-BACK
READ ID
RESET
PAGE PROGRAM (start)
COPY BACK PGM (start)
CACHE PROGRAM
BLOCK ERASE
READ STATUS REGISTER
RANDOM DATA INPUT
RANDOM DATA OUTPUT
CACHE READ START
CACHE READ EXIT
1st CYCLE
00h
00h
90h
FFh
80h
85h
80h
60h
70h
85h
05h
00h
34h
2nd CYCLE
30h
35h
-
-
10h
10h
15h
D0h
-
-
E0h
31h
-
3rd CYCLE
-
-
-
-
-
-
-
-
-
-
-
-
-
Acceptable command
during busy
Yes
Yes
Table 4: Command Set
Rev. 0.6 / Dec. 2006
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