HDMP-3268 Datasheet, PDF (9/18 Pages) Agilent(Hewlett-Packard) – 3.2 Gbit/sec 68x68 Crosspoint Switch

Table 7. HDMP-3268 DC Electrical Specifications
T_A = 0^°C to T_c=+85^oC, VCC = VDD = VCC_DOUT =2.35 V to 2.65 V
Symbol
Parameter
VDD
Logic Supply Voltage
VCC
Switch Array Power Supply
VCC_DOUT
High Speed Output Supply
Pd^[2]
Power Dissipation [TERM = 0]
Pd1^[3]
Power Dissipation [TERM = 1]
VOH_DU
Digital Interface Unterminated Output High Voltage,
IOH = -400 µA
VOL_DU
Digital Interface Unterminated Output Low Voltage Level,
IOL = 1 mA
VOH_DT
Digital Interface Terminated Output High Voltage
VOL_DT
Digital Interface Terminated Output Low Voltage Level
VIH_D (LVTTL)
VIL_D (LVTTL)
VIH_AC (SSTL_2)
VIL_AC (SSTL_2)
VIH_DC (SSTL_2)
VIL_DC (SSTL_2)
I IH_DU
I IL_DU
IIH_DT
I IL_DT
VREF14
VREFI
VREFO
Digital Interface Input High Voltage Level,
guaranteed high signal, VREFI tied to VREF14
Digital Interface Input Low Voltage Level,
guaranteed low signal, VREFI tied to VREF14
Digital Interface Input AC High Voltage Level,
guaranteed high signal, VREFI = 1.15 V to 1.35 V
Digital Interface Input AC Low Voltage Level,
guaranteed low signal, VREFI = 1.15 V to 1.35 V
Digital Interface Input DC High Voltage Level,
guaranteed high signal, VREFI = 1.15 V to 1.35 V
Digital Interface Input DC Low Voltage Level,
guaranteed low signal, VREFI = 1.15 V to 1.35 V
Digital Interface Unterminated Input High Current,
VIN = 2.4 V, VCC=2.5 V
Digital Interface Unterminated Input Low Current,
VIN = 0.4 V, VCC=2.5 V
Digital Interface Terminated Input High Current,
VIN = 2.4 V, VCC=2.5 V
Digital Interface Terminated Input Low Current,
VIN = 0.4 V, VCC=2.5 V
LVTTL Reference Output, TA = 25^°C
SSTL_2 Reference Input, TA = 25^°C
SSTL_2 Reference Output, TA = 25^°C
Units Min. Typ. Max.
V
2.35 2.5 2.65
V
2.35 2.5 2.65
V
2.35 2.5 2.65
W
13.5
W
15.5
V
2.2
VDD
V
0
0.6
V
VREFO +
0.38
V
-0.3
V
2
VDD+
0.3
VREFO-
0.38
V
V
VREFI+
0.35
V
-0.3
V
VREFI+
0.18
V
-0.3
µA -15
0.8
VDDQ+
0.3^[1]
VREFI-
0.35
VDDQ+
0.3^[1]
VREFI-
0.18
15
µA -15
15
mA
-12.5
mA
12.5
V
1.4
V
1.15 1.25 1.35
V
1.15 1.25 1.35
Notes:
1. VDDQ refers to the SSTL_2 power supply of the driving device.
2. Power Dissipation measurement was taken with a toggling pattern of 50 MHz applied to the high-speed input channels at 50% duty cycle. All
inputs and outputs are turned on.
3. Power Dissipation measurement was taken with Input logic ‘0’ applied to all control pins with a toggling pattern of 50 MHz applied to the high-
speed input channels at 50% duty cycle. All inputs and outputs are turned on.
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